Design Of Power Management Circuit For High-power IGBT Driver Chip

With the development of new energy vehicles and rail transit,IGBT has been widely used as the core device of electronic power systems.As a bridge between the control system and the IGBT power module,the IGBT driver chip is directly related to the safety and reliability of the IGBT work,thereby affecting the stability of the entire electronic system.The research on high-performance IGBT driver chips is helpful to improve the integration of power modules,improve the working environment of IGBT,and further promote the development of electronic power systems towards integration and modularization.Due to the working mechanism of IGBT,the power supply voltage of the driving chip is generally 15-20V.However,the voltage required for the internal control circuit is 5V or lower according to the process requirements,and the control circuit module is small,and the power supply voltage is high standard while the power consumption is low.In response to this feature,combined with the design requirements of the IGBT driver chip designed by this research group,this paper has designed an improved DC/DC and LDO cascaded power management circuit suitable for IGBT driver chips.It has the requirements of high conversion efficiency and low output ripple under low load and high voltage difference.The circuit structure uses a constant on-time(COT,constant-on-time)control technology DC/DC converter to ensure that the circuit has high conversion efficiency under high voltage difference and low load.LDO adopts NMOS type power tube,utilizes the characteristics of low output impedance at the output port,expands the loop bandwidth of LDO,pushes the inflection point of PSRR to high frequency,and achieves a high PSRR in a wide frequency range,thereby effectively filtering DC/DC output ripple;at the same time,the LDO control loop uses the chip power supply voltage,saving the boost module and reducing the chip area.This paper also designs a new type of driving buffer circuit,which can meet the output requirements of the three driving modes,and improve the driving ability and integration of the chip.The circuit design is based on Central Semiconductor Manufacturing Corporation CSMC 0.25?m process,using Cadence Virtuoso for simulation verification.After simulation verification,the designed power management circuit achieves a stable voltage drop of 15V to 5V,the output accuracy is less than 0.06%,the maximum output current is 40mA,the output ripple is about 2mV,the maximum conversion efficiency is 74.7%,and it has good transient response.Among them,the LDO PSRR is-73dB in the low frequency band,and still has-40dB at 1MHz.The research in this paper has a certain reference value for improving the conversion efficiency and stability of the power management circuit in the IGBT driver chip.