Theoretical Study On The Sub-10 Nm Two-dimensional Tunneling Transistors

To reduce the power consumption of field effect transistors?FETs?is the developing demand of post-Moore semiconducting technology.Tunneling FET?TFET?is suggested as a potential electronic device since it can break the thermal Boltzmann limit of subthreshold swing?SS?,i.e.,60 mV/dec.Thus,the supply voltage can be cut down and the dynamic power dissipation is reduced.The main block for realistic application of a TFET with conventional bulk channel is the low on-state current(I_on).The use of two-dimensional?2D?channel would improve the on-state current(I_on)of a TFET significantly because the atomic thickness body ensures an excellent gate control ability and the flat and free-of-bond surface reduces the carrier scattering.In this thesis,the device performances of the sub-10 nm 2D planar TFETs are studied using the ab-initio quantum transport simulation.The requirements of the International Technology Roadmap for Semiconductors?ITRS?for high performance?HP?and low power?LP?devices are given for comparison.A series of new stable semiconducting monolayer?ML?materials are considered as channels,i.e.,ML hexagonal group V-enes?arsenene,antimonene,and bismuthene?and ML group-IV mono-chalcogenides?GeS,GeSe,GeTe,SnS,and SnSe?.The results are as follows:?1?Among the ML arsenene,antimonene,and bismuthene TFETs,the ML bismuthene TFET has the largest on-state current I_on?1153?A/?m?for HP application.Furthermore,a ferroelectric dielectric is adopted in the ML bismuthene TFET to make anegative capacitance TFET?NCTFET?,and the resulting I_on is dramatically elevated to 1868?A/?m,which has meet the requirement of ITRS for HP devices?1450?A/?m?.Considering that bismuthene has a good stability,so ML bismuthene NCTFET is a promising device for HP application.?2?ML GeSe is a potential channel material for both HP and LP application in a TFET architecture,and ML GeTe and Sn Se for HP application.Notably,the device performance of the ML GeSe TFET can still exceed the ITRS requirement for HP devices until the length gate is reduced to less than 4 nm.Moreover,by adding50?80-nm-thick proper ferroelectric dielectric,I_on of the ML GeSe and GeTe NCTFETs can elevate to about twice of those of their TFET counterparts.?3?Two indicators are suggested to search a competitive 2D channel with a high I_on for HP application for the TFET device with a planar homogeneous p-i-n architecture,that is the band gap E_g of 0.77?1.19 eV and the average effective mass along the transport direction of ??? of 0.11?0.15 m₀.