Design And Research Of Nanoscale Field Effect Transistor Based On SiC

With the continuous improvement of device performance in application fields,the devices based on Si are difficult to meet the requirements due to the limitation of their materials.Moreover,integrated circuits have been continuously developed in accordance with Moore's Law,and the feature size of devices has continued to decrease.Traditional field-effect transistors based on silicon have reached their physical limits as the core devices in integrated circuit circuits.,The short Channel effects,quantum effects will appear if the device size is further reduced which seriously affect the performance of the device,resulting in the device not working properly.The two-dimensional materials represented by graphene,transition metal sulfide,black phosphorus,and SiC have the advantages of thin thickness,smooth and smooth surface,and good flexibility.They have become the ideal channel materials for new generation electronic devices.The following research has been carried out on the dimensional material field effect transistor:The n-type Schottky contacts could be formed between monolayer SiC and Ag,Au electrodes with electron Schottky barrier heights(SBH)of 0.7 eV and 1.1 eV,respectively.Whereas,p-type Schottky contacts were formed between monolayer SiC and Al,Pd electrodes with hole SBH of 1.0 eV and 0.1 eV,respectively.When the gate length was equal to 5.1 nm,SiC-SBFETs with four metals all could overcome the short channel effect due to the wide bandgap of SiC.SiC-SBFETs just contacting with Ag and Pd have a better ON current and achieve 853 ?A/?m and 924 ?A/?m,respectively.Owing to the superior metal contact,high interlayer interaction efficiency and low SBH,the best performance of SiC-SBFET contacting with Pd is achieved to satisfy the ITRS HP requirement down to 5.1 nm technology node.Therefore,the metallic material Pd is the best choice of electrode material for SiC-SBFET devices.In this paper,the ab initio calculation method based on density functional theory is adopted to research the field effect transistor with SiC two-dimensional material as the substrate.Using ATK software to build a device model,by comparing and studying the electronic structure and IV characteristics of SiC Schottky barrier field effect transistor(SiC-SBFET)with four different work function metals(Ag,Au,Al and Pd)material electrodes and achieving the electrode material selection.On this basis,the modification of SiC-SBFET is investigated through the channel length control.For Ag-SiC SBFETs and Pd-SiC SBFETs with a channel length of 4.1 nm,their on-state currents were reduced to 469 and 598 ?A/?m,respectively,and devices with a channel length of 3.1 nm for Ag-SiC SBFETs could not even reach the off state.The on-state current of Pd-SiC SBFET with a channel length of 3.1 nm is also reduced to 117 ?A/?m.This shows the existence of the short channel effect,the reduction of the channel length will greatly reduce the performance of SiC SBFET devices.Four different underlap structures have different effects on the performance of monolayer SiC SBFET devices.Monolayer SiC SBFETs with gate lengths Lg=5.1 nm and Lg=4.6 nm can meet the off-state requirements.However,the on-state current of single-layer SiC SBFETs with gate length Lg=5.1 nm is reduced to 841 ?A/?m and 624 ?A/?m,so the way to extend the channel to form an underlap is not ideal.However,the on-state currents of SiC SBFETs with gate length Lg=4.6 nm and underlap structure at the source and drain are 2792?A/?m and 1754 ?A/?m,respectively,which is almost three times and twice of performance requirement of high-performance(HP)FETs with gate length of 5.1 nm outlined by the ITRS.It can be seen that shortening the gate to form an underlap greatly improves the performance of the SiC SBFET device,and the underlap structure at the source have a better performance.