Key Technologies For Ge-based Tunneling Field Effect Transistor

With the improvement of semiconductor manufacturing technology,the feature size of integrated circuits has been reduced to nanoscale,and the development of Moore's Law has entered a bottleneck period.In order to further promote the development of Moore's Law and improve device performance,researchers pay their attention to TFETs.The operation of TFET is mainly based on band to band tunneling of carriers to obtain on-state current and is not affected by the carrier thermal effect.By changing the structure and the material can increase the on-state current and reduce the off-state current.In this paper,Ge-based n-type TFETs are researched to optimize,and the basic working principles and the influencing factors of the tunneling generations of normal TFETs are discussed.First,an n-type TFET structure with an n+pocket layer is proposed.Since the abrupt junction formed by the n+pocket layer and the source region increases the on-state tunneling area,the on-state current of the TFET increases to 2.25×10^-4 A/?m.Based on the aboved structure and keeping the on-state current unchanged,DMDT-DGTFET and HCDMDT-DGTFET structures are proposed.DMDT-DGTFET structure reduces the off-state electric field near the tunneling region by increasing thickness of the gate oxide layer near the channel-drain region,which reduces the off-state current.HCDMDT-DGTFET structure uses a hetero-channel based on the DMDT-DGTFET structure,which makes that the off-state current is as low as 2.6×10^-12A/?m and SS decreases to 39.2mV/dec,and the on-off current ratio increases to 1.1×10⁸.Secondly,a threshold voltage model of Ge-based n-type TFET structure with n+pocket layer is established in this paper.The related factors of threshold voltage are analyzed,such as the dielectric constant of the gate oxide layer,the thickness of Ge layer,the voltage of drain-source,and the length of gate oxide layer.Comparing the theoretical results with simulation results,two kinds of results are completely consistent.Third,a novel junctionless Ge-based lightly doped drain region?LDD region?n-type TFET structure is proposed.The physical parameters are optimized using the method that is similar to n-type TFET structure with an n+pocket layer.The simulation results of this structure illustrate that the on-state current is 5.5×10^-5A/?m.Compared with the normal Ge-based n-type TFET,this junctionless device increases the on-state current effectively.Finally,the effective area of tunneling is also increased.Therefore,the LDD region plays a key role in improving the performance of Ge-based n-type TFET.The on-state current and the off-state current of the junctionless Ge-based n-type TFET are compared when both channel region and the LDD(N_LDD)region have different doping concentrations.The results illustrate that the optimized N_D is selected as 1×10¹⁸cm^-3 and and N_LDD is selected as 1×10¹⁷cm^-3,and the off-state current is reduced 1 order of magnitude respectively.The slope gate oxide structure can suppress the gate-induced leakage current effect.This structure reduces the subthreshold swing to 46.2mV/dec and the on-state current is4.05×10^-5 A/?m,and the on-off current ratio is 5.7×10⁶.