Research On Seeker Signal Processor On MiniVPX Standard

Mini VPX is a miniaturized system platform which is suitable for resource-constrained application scenarios such as device size,weight,power consumption and cost.Compared with the traditional Open VPX 3U standard,Mini VPX has more advantages like higher integration and smaller size,and is capable of providing a standard modular electronic system hardware solution for platforms such as missiles,drones and small satellites.In this thesis,a miniaturized and scalable homing signal processor is developed based on this standard.The main work is as follows:1.The design scheme of the homing signal processor based on Mini VPX architecture is proposed.Various function boards such as signal acquisition preprocessing,signal processing,central control and communication,and waveform generation are developed.The high-speed data interconnection link and the control bus transmission link among each module are constructed.The design difficulties and key technologies of the modules are broken through,including the design of analog front-end conditioning circuit of analog-todigital converter,the synchronous method of multi-channel high-speed analog-to-digital converter,and the control method of digital signal processor power-up timing.2.The power integrity and signal integrity of the functional module of the system platform are analyzed.Using the Hyper Lynx simulation tool,the circuits designed by EDA(Electronics Design Automation)are simulated.The simulation content mainly includes DC voltage drop simulation,DDR3 SDRAM interface simulation and high-speed interconnect link simulation between boards.The simulation results are analyzed and the electrical performance of the functional modules is determined.3.The design of the new high-speed analog-to-digital converter interface driver is completed.The preprocessing method of the radar signal,which is implemented by FPGA,is explained.The key performance indicators of the system platform are tested.Finally,the rationality and correctness of the hardware design and software design of the signal processor is verified by means of a simulated experiment of pulse doppler radar.