Physical Realization Of Redundant Metal Filling In Double Patterning Process

Today's information society owes much to the great development of integrated circuits.Since the birth of integrated circuits,tens of billions of transistors have been integrated on a single chip.The manufacturing technology and design methods of integrated circuits have changed greatly.The manufacturing process nodes of integrated circuits have approached atomic size.Advanced manufacturing processes such as lithography and chemical mechanical polishing(CMP)show dependence on chip layout,which can easily lead to deviations in key dimensions,which ultimately affect the overall performance and yield of the circuit.Process deviation and chip manufacturability have become the key factors restricting the performance and yield of integrated circuits.Redundant metal filling technology belongs to a new generation of design methodology and is an important technology in manufacturability design and yield-driven design methods.Aiming at the process deviation caused by lithography and CMP,the density distribution of interconnects can be improved by filling redundant metals,and the size loss of interconnects caused by process deviation can be reduced.At the same time,the lithography process has reached the engineering limit in the process of 14 nm and below.In order to get a smaller size of the wire width,it is necessary to adopt double exposure technology for interconnects,and this double exposure technology also puts forward higher requirements for redundant metal filling technology.Therefore,this paper focuses on the physical realization of redundant metal filling in double exposure process(i.e.14 nm process).Firstly,without modifying the original layout,considering the density,density gradient and filling rate of redundant metals,a new method of filling redundant metals to meet the requirements of lithography and CMP process is proposed,which is to design different redundant graphs for different filling areas by distinguishing filling areas.The influence of density gradient of layout on chip manufacturability is becoming more and more prominent in advanced technology,but the traditional filling method can only fill as many as possible in places that meet the conditions,without considering the problem of density gradient.In this paper,starting with redundant metal graphics design and filling condition constraint design,the filling conditions are optimized by DFM smart filling tool,which ensures that both density constraints and gradient constraints are considered in the filling process of redundant metal.The density of metal graphics is successfully controlled in the range of 20%-80%,and the density gradient of adjacent windows is not more than 40%.At the same time,for the advanced manufacturing process of 14 nm double exposure technology,not only the requirements of CMP process,but also the characteristics of double exposure process,that is,all redundant metal patterns need to be evenly split into two different masks.In this paper,by using DFM smart filling system to set different output conditions,redundant graphics are successfully divided into different masks,so that the redundant graphics of each mask account for 50% of the total number of redundant pattern.Secondly,the CMP model is established to verify the actual effect of redundant graphics filling by CMP model validation.The simulation results show that the flatness and metal thickness of the chip after redundant metal filling meet the actual needs of production.It greatly reduces the time cost of wafer verification and the cost of wafer,thus reducing the total time of tape out.