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Research On High-speed And High-precision ADC/DAC Data Deep Storage And Digital Frequency Conversion System Based On FPGA

Posted on:2021-02-14Degree:MasterType:Thesis
Country:ChinaCandidate:N X WuFull Text:PDF
GTID:2428330602477686Subject:Electronic and communication engineering
Abstract/Summary:PDF Full Text Request
The software radio transceiver is a highly reconfigurable wireless communication hardware platform.Using software to realize various functions of the radio transceiver is one of the research hotspots in the communication field.As one of the key modules in the wireless communication system,the digital frequency converter determines the performance of the entire hardware platform,and the data synchronization method and data storage depth are the prerequisites for analyzing the communication protocol and have important research value.This thesis focuses on digital frequency conversion technology,data synchronization method and deep storage technology.The main contents of this thesis include the following aspects:1?The development trend of traditional wireless receivers and the research status of digital frequency converters domestic and abroad are introduced.The characteristics and application scope of different implementation methods of digital frequency converters are compared.2.The advantages and disadvantages of different implementations of key modules in digital frequency converters are analyzed.A digital down converter(DDC)with 14 decimation factors and a digital up converter(DUC)with 4 interpolation factors are designed using technology which optimize filter coefficients,using polyphase filter structure,and sharing filter,the technology effectively reducing the design area and power consumption.3?In order to solve the data synchronization and data storage problems of high-speed and high-precision analog-to-digital converters(ADC),pseudo-random binary sequence(PRBS)codes are used to achieve stable synchronization of input data.By optimizing the memory control module,a data storage depth of 200MB is achieved.4?A high-speed parallel data interface technology of Digital-to-Analog Converter(DAC)based on training feedback mechanism is proposed.This technology solves the problem of requirement of equal length wiring of high-speed circuit boards by introducing data feedback channels and sampling time training mechanisms to achieve data synchronization.reduces the design difficulty of the circuit board and improves the reliability of the system.5?The performance of the deep data storage and digital frequency conversion system are verified based on FPGA.The verification results show that the performance of the digital frequency converter meet the design expectations,the ADC data synchronization and deep storage function meet the design goals,and the DAC high-speed parallel data interface technology based on training feedback mechanism Works correctly.The FPGA-based high-speed and high-precision ADC/DAC data deep storage and digital frequency converter system designed has carried out preliminary verification for the implementation of the digital frequency converter embedded in the ADC/D AC,and provided a solution for high-speed high-precision DAC data interface design,and hardware support is provided for the analysis of communication protocol adaptability.
Keywords/Search Tags:digital frequency converter, FPGA, data synchronization, ADC, DAC
PDF Full Text Request
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