Researching The Test Method Of PCB Functional Module Based On Boundary Scan Technology

With the use of surface mount technology, printed circuit board (PCB) higher and higher density has been difficultly using the traditional needle-bed testing techniques to increase circuit test points, for complex circuits on adding a separate test circuit to test only traditional methods and other methods of improvement, improving circuit testability very limited and less versatile and systems to improve the circuit testability, and jointing testing and boundary scan test techniques. It provides interconnection on the circuit board device. the device functions to test the new method is a complete, standardized testability design methodology, enhancing circuit testability, and reducing the maintenance and protection of circuit boards. the cost is of great significance.In this paper, boundary-scan technology, the basic principles and methods of in-depth study and research, is established a functional module PCB failure mathematical model. Generational ideas and fault diagnostic capabilities in terms of the classical boundary-scan test vector generation algorithm is a careful analysis and summary; Based on testing of completeness and the requirements, algorithm presents a right to the value of such optimized inter - Even testing algorithm. The algorithm not only inherits the right of the value of the algorithm such as compact, but also a symptom of failure in reducing the rate of confusion. It is an excellent performance of algorithms.This paper designs and implements the boundary scan test software. Through the TAP control module, test pattern generation module, integrity test module, as well as interoperability testing, and so the module design is complete the entire software design. According to the network table file and the BSDL file generation test pattern, through the parallel port PC-test protocols to send signals, using the system for a PCB board-level scan chain makes integrity test and chip interconnect testing. Test results show that the system can achieve the fault diagnosis of board-level testing requirements; fault coverage is high and pin-level fault location accuracy. In digital circuit fault diagnosis, the software has broad application prospects.