Integrated Circuit Design Of Adjustable Delay Line

Due to the continuous development of information and communication technologies.The timing change of signals in the transmission process has an important influence on the entire communication system.Therefore,some delay compensation circuits need to be added in the system design to overcome the damage and distortion of the signal caused by the timing change of all kinds of wireless signal,and to eliminate the influence on the communication system.This makes the design of delay circuit become more and more important.As part of the delay line,the delay circuit is used to compensate the time difference of the communication signal and eliminate the timing effect of the signal.It can also be reasonably used in the related system designs such as phased array radar,ultrasonic nondestructive testing,and broadband beam forming transceivers by making use of the work characteristics of the delay circuit and changing the time series of the signal.Therefore,the research and design of the delay line circuit has a broad application prospect and practical significance.Based on extensive research on related literature,this paper studies and designs an integrated circuit with adjustable delay line.The whole circuit adopts the combination mode of fine adjustment and coarse adjustment.The coarse tuning part that is mainly composed of a fixed delay module,a digital circuit control module,and a switch selection module can realize the performance of large delay through multiple cascaded fixed delay cells.The coarse tuning part determines the series of the fixed delay module in the cascade system by the selection of the switch and the control of the digital circuit,which can realize the delay time in different range according to the different requirements.The fine-tuning part adopts the variable capacitance controlled by voltage to realize the function of the continuous adjustment.The matching circuit between the coarse tuning part and the fine-tuning part is used to complete the matching characteristics in the two modules.The whole system can realize continuous adjustable delay on a wide range of functions.A delay line circuit is designed using 0.18 m CMOS process.The whole chip size of this design is 800μm×1320μm.Under the power supply voltage of 1.8V,the experimental results of the post simulation are as follows: The fixed delay cell can achieve 26 ps over 4GHz to 4.5GHz.Moreover,the fine-tuning delay can achieve continuously adjustable delay within 38 ps,which can cover the delay of fixed delay cell.Due to the influence of cascading of seven level fixed delay cells and the interaction with the fine adjustment module,the whole circuit can only achieve a continuously adjustable delay within 200 ps.and the delay jitter is 6%.The input return loss is better than-10 dB,output return loss is better than-9dB,the static current of the circuit is 46 mA.The post-simulation results can basically achieve the expected design targets.The design of the adjustable delay line in this paper is helpful to the establishment and design of the delay circuit model.