Circuit delay is affected by many factors, such as supply voltage, operation temperature, interconnect signal coupling, and surrounding circuit switching patterns. On-chip memory stability is also a function of defects, manufacturing process variabilities, and supply voltage fluctuations. In this dissertation, we analyze circuit delays; we also propose accurate and efficient models to estimate circuit performance and stability. Experimental results show that the proposed models accurately capture the effects of noise, manufacturing variabilities, and supply voltage fluctuations on circuit delay and stability. |