Font Size: a A A

Implementation Of Ethernet Medium Access Control Protocol Control Module Based On FPGA

Posted on:2019-03-22Degree:MasterType:Thesis
Country:ChinaCandidate:Q H YinFull Text:PDF
GTID:2428330596960287Subject:Engineering
Abstract/Summary:PDF Full Text Request
With the rapid development of network technology,in the fields of data computing,financial payment and multimedia applications,there is an urgent need for greater network bandwidth.10 Gigabit Ethernet technology inherits the IEEE802.3 standard,it can realize low bandwidth access and high bandwidth transmission.Therefore,the 10 Gigabit Ethernet technology has a broad development prospect.This proposal comes from the National Nuclear High-level Project "XXX protocol processor",based on the FPGA development board,and focusing on the design of medium access control layer circuit,supporting MAC layer protocol,this paper proposed a circuit which has improved the utilization of network resources and a flexible packet sending and receiving implementation.In this paper,the analysis of the standard of IEEE802.3ae network protocol was first given,the system structure of 10 Gigabit Ethernet,data frame format,flow control mechanism,pause frame and medium independent interface are studied in detail,a integral implementation framework for the 10 Gigabit Ethernet MAC layer protocol medium access control circuit module is proposed,and performs module partition and scenario analysis.Then the specific hardware design of each submodule are elaborated in detail.After that,UVM verification platform was built,the verification results show that the logic circuit is implemented correctly.Then use the Xilinx V7 series FPGA development board for board-level prototype verification,and its clock frequency can reach 236.787 MHz.There is no timing violation occurred.The DC tool of Synopsys was used for logic synthesis,achieving 10 Gbps transmission rate and supporting 32 bit cyclic redundancy check algorithm,which meets the performance requirements of this circuit.At last,the summaries and prospects about the work of this topic is given,points out the deficiencies in the subject,and points out the direction for further research on this topic.This project has completed the design of MAC layer protocol medium access control circuit module in the network processor based on FPGA development board.The verification results show that this design can meet the requirements of the 10 Gigabit Ethernet MAC IEEE802.3ae related standards,and it is feasible in the practical application.The MAC layer medium access control circuit module designed in this project has important engineering practical significance in improving the quality of network services in the areas of Internet of Things applications,big data and cloud computing.
Keywords/Search Tags:MAC, Ethernet, Loss Idle Count Algorithm, Network Processor, FPGA
PDF Full Text Request
Related items