A Research Of Path-based Test Method For Network-on-Chip

With the development of semiconductor manufacturing technology and integrated circuit design method,it is possible to integrate many processor cores into the single chip.At the same time,the complex Multi-core or Many-core Systems-on-Chips(SoCs)with a large number of IP cores put forward more stringent requirements for the interconnection structure that can support its efficient operations.Compared with traditional communication structures such as bus and switching matrix,Network-on-Chip(NoC)has the advantages of high bandwidth,low latency and strong scalability.Therefore,the NoC has become the main communication structure of the Multi-core or Many-core SoCs.In the deep submicron era,the shrinking feature size and growing device defects have a negative impact on the stability of the chips.As a communication architecture supporting the efficient operation of the digital systems,the reliability of NoC naturally becomes a problem that can not be ignored.This reliability problem is mainly manifested in the introduction of various physical defects to the network,which leads to circuit logic faults,and ultimately leads to errors in the behavior of communication functions.Therefore,the research on testing methods for NoCs has become one of the research hotspots accompanying the technology progress of NoC.The purpose is to find out the faults in chips during the manufacturing process and the lifetime as early as possible under the low cost of auxiliary hardware and performance overhead,and take timely measures to repaire of avoid them.Based on the common physical faults,this thesis researches the testing methods and strategies and proposes a path-based testing method for NoC,considering the area and power comsumption of the test hardware and the performance impact.The contributions of this thesis are listed in three parts:1)Research on fault analysis and Design-for-Testibility(DFT)of NoC.In the view of the characteristics of different types of faults in NoC,this thesis proposes the appropriate testability design technology to detect the faults in the network layer and data link layer of NoC and provides a testing mechanism with high feasibility and low performance loss.2)Research on test wrapper of path-based NoC.Traditional NoC testing methods mostly use single transmission path or multiple routers as test targets and become test wrapper,which leads to the problems of incomplete coverage and large performance loss in falut online testing.This thesis presents a new test wrapper for NoC based on the transmission path.The experiments proves that the test wrapper not only guarantees the correctness of network functions,but also overcomes the shortcomings of the traditional test wrapper.3)Research on testing strategy of path-based NoC.Testing strategy refers to the management,scheduling and triggering of the whole network testing process to achieve the completeness and efficiency of NoC testing.In the research of path-based testing strategy,this thesis explores the influence of the different test sequences and test time interval on system performance on the basis of ensuring feasibility.