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Research On Constrained Routing Algorithms In Large Scale Optical Switch Chips

Posted on:2020-07-25Degree:MasterType:Thesis
Country:ChinaCandidate:J H ZhangFull Text:PDF
GTID:2428330596475524Subject:Engineering
Abstract/Summary:PDF Full Text Request
In order to improve the performance of the chip system,this thesis focuses on the network topology and the optimization of the routing algorithm of the optical switch chip.The performance differences between different topologies are compared and analyzed.Three routing algorithms that improve the crosstalk or insertion loss performance of the switching network are proposed for the rearrangement non-blocking Benes structure,including optimal loop routing algorithm,hierarchical optimization routing algorithm and constrained link routing algorithm.The main work content and innovation are as follows:1.Based on the comparison of various topologies and routing algorithms,an optimal loop routing algorithm for improving crosstalk performance is proposed for the rearrangement non-blocking traditional Benes structure.Based on the experimental system of optical switching chip in our laboratory,it is found that when the silicon photon switch is switched from its initial state(i.e.bar state)to the cross state by carrier dispersion effect,carrier absorption can cause the deterioration of crosstalk and insertion loss of optical switches,so the optical switches should be kept parallel as much as possible.Compared with the traditional loop routing algorithm,this algorithm can significantly increase the number of bar state switches,significantly optimize the overall crosstalk performance of the system,and also select a switch combination state with smaller crosstalk.2.A hierarchical optimization routing algorithm is proposed for the dilated Benes structure,which is almost negligible by crosstalk,and the effectiveness of the algorithm is verified by the exhaustive method.Based on the performance difference in different states of optical switches,the hierarchical optimal routing algorithm can reduce the insertion loss by introducing weights associated with insertion loss.The result of the hierarchical optimization routing algorithm is that the routing between the input and output ports forms an independent closed loop with no idle light switches.Research shows that through the hierarchical optimization routing algorithm,a variety of optimal switch combination states can be obtained,which effectively improves the fault tolerance of the chip,and can obtain the switch combination state with the best insertion loss consistency.Therefore,the dilated Benes structure is particularly suitable for crosstalk limited systems.3.A constrained link routing algorithm is proposed,which is suitable for the dilated Benes structure with non-full configuration of input and output ports,and can achieve efficient non-blocking routing.The constrained link routing algorithm firstly groups the optical switches to be configured according to the lateral constraint and the subnet connection relationship of the optical switches,and then optimizes the optical switch combination state to form a link route that satisfies the switching requirement.There is no need to do any processing to other idle optical switches,so the configuration efficiency of optical switch chip is improved.Research shows that when the optical switch loses the light-passing function(complete fault),the hierarchical optimization routing algorithm will no longer be applicable.In this case,the constrained link routing algorithm can be used to avoid the corresponding fault optical switch and call the idle optical switch to redistribute the switch path.
Keywords/Search Tags:optical switch chip, topology structure, routing algorithm, switching performance
PDF Full Text Request
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