Efficient Jump Test For CNFET-based SRAM

With the development of science and technology,the demand for high-performance computing and big data processing is increasing.In the past these computing needs relied heavily on the development of semiconductor industry.The semiconductor industry famous Moore's law: The number of transistors in a dense integrated circuit doubles approximately every 18 months,the performance of the processor and the corresponding energy consumption increase 2 times.However,the industry foresaw Moore's law dying here in the next decade or so.As a kind of typical quantum materials,carbon nanotube(CNT)has excellent electrical properties.SRAMs built on Carbon Nanotube Field Transistors(CNFET)are promising alternatives to conventional CMOS based SRAMs,due to their advantages in terms of power consumption and noise immunity.However,the non-ideal Carbon Nanotube(CNT)fabrication process generates metallic-CNTs(m-CNTs)along with semiconductor-CNTs(s-CNTs),leading to correlated faulty cells along the growth direction of the m-CNTs.In this paper,we propose a novel low-cost test solution to detect such faults.Instead of using conventional March test to test each and every SRAM cell,we selectively test certain SRAM cells and judiciously skip testing other SRAM cells between the selected cells,which can save significant test cost.