Design And Implementation Of A DVB-T2 Demodulator Verification System Based On HAPS64 FPGA Platform

The second generation of the European digital terrestrial broadcast standard(DVB-T2)is currently the most advanced digital terrestrial TV system,which has a greater system capacity,more flexible forms of networking and higher spectrum efficiency.It was adopted by many carriers in Europe,Afric and Asia,which led to its huge demand for terminal equipment.DVB-T2 demodulator design with high complexity and larger scale,in the verification stage of the design need to spend a lot of time and resources,so the design of a set of perfect and efficient FPGA verification platform is very important for success of the product.This Paper presents a DVB-T2 demodulator FPGA verification system.It is designed through using my company's existing FPGA hardware platform and other hardware resources and studying the experience on previous demodulates developer verified.The FPGA verification system provides a strong support for the DVB-T2 demodulator development and validation,also ensure that the chip verification work is completed on time.This paper mainly completed the four following works: First,designed the DVB-T2 demodulator hardware verification platform of the overall program,including the part of the platform components and connections;Second,completed the design of the front-end daughter board,including requirements analysis,schematics and PCB design,and testing the daughter board;Third,completed the development of a automatic testing tools for the receiving performance of DVB-T2 demodulator.The automatic testing tool based on the SFU saved a large amount of manual test,and greatly improves the efficiency and accuracy;Fourth,completed the development of FPGA tool based on UMRBus,including the definition of the function of the FPGA tools and overall design,and debug and verify the tool with the software and hardware developersThe demodulator verification system have general applicability and can support all current digital TV standard demodulator development verification,the chip is designed to provide better validation support,and greatly improve the efficiency of verification.