Research On High Frequency E_n-I_n Noise Model Of Nano MOSFET

CMOS microelectronics technology has the characteristics of high integration,low cost and excellent performance.It has been used in the design of RF microwave communication circuits,especially low noise preamplifier circuits.Accurate MOSFET small-signal equivalent noise circuit model is the design basis of CMOS low-noise amplifier.The simulation analysis and design of the circuit not only makes it easy to dynamically observe the relationship between circuit parameters and circuit parameters,but also guides the optimal design of the circuit,thus shortening the design cycle and reducing the design cost.At present,the high-frequency noise physical model of nano-MOSFETs is usually characterized by a 2-port equivalent noise current model,which cannot be directly used for design analysis of low-noise amplifier circuits.Therefore,this paper focuses on the high-frequency E_n-I_n noise model of nano-MOSFETs.The main contents are as follows:Firstly,the high-frequency physical model of the 2-port equivalent noise current of 130nm MOSFET and its original data are clarified.The ADS simulation model of the small-signal equivalent noise circuit and the raw data of the four-noise parameters are determined.The software is based on ADS 2008.The scattering parameters and four-noise parameter simulations verify the validity and accuracy of the simplified model of the small-signal equivalent noise circuit.Secondly,using the 2-port noise network analysis theory,the 2-port equivalent noise current model is transformed into a 2-port equivalent input noise voltage and current model(ie E_n-I_n noise model),and the E_n-I_n noise model is characterized accordingly.The relationship of four noise parameters.Using the original data of the 2-port equivalent noise current model of 130 nm MOSFET,the proposed E_n-I_n noise analysis is verified by comparing the four noise parameters calculated by the E_n-I_n model conversion data with the original four noise parameters of the device.The validity of the model.Finally,based on the proposed E_n-I_n noise model analysis method,based on the noise analysis of the designed first-stage differential amplifier circuit and the second-stage cascode amplifier circuit respectively.The overall noise performance evaluation of a two-stage cascaded 130 nm CMOS amplifying circuit is achieved.Among them,the noise figure of single-stage and total-amplifier circuits calculated based on E_n-I_n model is consistent with the simulation results of ADS 2008 software,which verifies the necessity and effectiveness of applying E_n-I_n noise model in linear circuit design.