Verification For LPDDR4 Controller Based On UVM

As new generation of SDRAM storage,LPDDR4 SDRAM has higher data rate and lower power consumption,which meets the need of high performance and long endurance in mobile application.LPDDR4 is widely used as memory in mobile devices.In So C chips,LPDDR4 is connected to network on chip via memory controller.System accesses LPDDR4 data and other functions via LPDDR4 memory controller.As the bridge between memory and system,full play of LPDDR4's performance depends on memory controller's performance.In chip development,complete verification for memory controller design is in need to ensure that LPDDR4 can work stably in high speed in chips.As IC design goes more complex,risk of functional defects increases,which will cause failure in tapping out,taking extra money and time.It has adverse effects for products in market competition,which is why verification plays a more and more import role in chip development.UVM has clear architecture,reusability and compatibility,which makes UVM the most popular verification methodology in IC industry.This thesis completes the verification of LPDDR4 memory controller designed by Intel.Verification work is divided into two phases.The first phase focuses on functional verification of LPDDR4 memory controller.The second phase focuses on improving verification's completeness.Based on study of LPDDR4 SDRAM and LPDDR4 memory controller design specifications,this thesis analyzes verification requirements of LPDDR4 memory controller,extracts verification functional objects,and designs test methods for each verification object.Based on UVM and gray-box test,this thesis builds a hierarchical and reusable verification platform,and designs components.Then tests verification objects with SV test cases.This thesis uses VCS for simulation and DVE for waveform check,and analyzes error through log file,waveform and RTL code.This thesis uses coverage to evaluate verification quality.After analysis and improvement of coverage,code coverage reaches 99.73%,function coverage reaches 100%,which meets goal.This thesis does further study based on current verification work,and optimizes verification through improving test bench,test case and test ideas.This thesis increases completeness of verification through improving handshake check,timing relationship check,data correctness check,random test and performance test.This thesis studies verification for complex modules like LPDDR4 controller based on UVM,and further studies methods of improving completeness,which is particularly instructive and has practical engineering meaning for verification work in IC industry.The verification work finished in this thesis has high completeness.So C chip has been taped out successfully.After testing sample chips,no LPDDR4 controller related functional bugs are detected.