Research And Implementation Of Encryption System Based On SHA-256 Algorithm

With the rapid development of electronic technology,the popularity of embedded system products and the application of large-scale integrated circuits have penetrated into all aspects of people's work and life,resulting in copyright protection for software and hardware intellectual property rights,system security operations,and so on.Critical research issues become important and urgent.Since 1993,the National Institute of Standards and Technology and the National Security Agency of the United States set the Secure Hash Algorithm(SHA)as an encryption standard.Since the SHA-256 algorithm is highly resistant to collisions and irreversibility,it has been widely used.Used in areas such as authentication.For the current situation that the software and hardware systems of embedded electronic products are being copied and infringed,the research on the encryption system based on SHA-256 algorithm is of great significance.This paper studies and proposes an encryption system based on SHA-256 algorithm and on-chip true random number generator.The SHA-256 algorithm was selected as the core algorithm of the encryption system,and the true random number was applied as a temporary authentication certificate to realize the protection requirements for the embedded software and the hardware system.After determining the overall structure of the encryption system and the composition of each functional sub-module,the functional sub-modules are separately analyzed and implemented one by one,thereby completing the SHA-256 algorithm encryption system.At the realization and simulation stage of the function sub-module,this paper mainly studies the basic concepts,implementation principles and algorithm flow of the SHA-256 algorithm,and completes the hardware implementation with the standard Verilog language.The theory of on-chip true random number generator is studied deeply.The design of true random number generator is completed based on the oscillator sampling method.Finally,the design is tested with FIPS 140-2 standard.Using Altera's Stratix ii series EP2S60F672C3 N chip and STM32F103 VE microprocessor in Quartus II 12.0 and Keil uVision4 development environment,after completing the system hardware platform,the application program is downloaded to the development board,the SHA-256 algorithm encryption system Board-level verification shows that the encryption system has achieved the desired function.