Design And Implementation Of Digital Channel For High Performance Narrowband Zero-IF Transceiver

Facing the current status of multi-protocol communication,communication terminals are required to have compatibility and dynamic reconfiguration.Software radio can solve the problem of coexistence of multiple protocols,and the combination of dynamic reconfigurable technology makes the use of communication terminals more convenient.The digital channel is a module between the analog front end and the baseband in the software radio transceiver.The software radio samples the data at the intermediate frequency or the radio frequency,and the data rate is extremely high.After the resource-saving zero-IF structure is selected as the analog front end,the transceiver has problems of local oscillator leakage and IQ imbalance.Therefore,it is especially important to design a digital channel that is compatible with multiple communication modes,with sample rate conversion,filtering,IQ calibration,and channel gain adjustment functions.This paper designs a digital channel module for high-performance narrow-band zero-IF transceivers.It is used in integrated communication terminals.The analog front-end used is a zero-IF transceiver structure,which is compatible with multi-node networking,4G and S-band satellite communication and other communication protocols.The main research contents and methods of this paper are as follows:In order to meet the requirements of various communication protocols,the overall design indicators are firstly decomposed into each module,and the structure of the digital channel is designed under various communication protocols,then,integrated into a digital channel that satisfies all indicators.The specific indicators are designed to design the number and coefficient of the cascaded filter module of the transceiver channel,plus,the polyphase filter and the multiplexing resource are used to optimize the structure of the filter.The bits of the signal and coefficient are designed according to the requirements.Then,we design the channel gain module,and each sub-module is designed in detail to save resources.Based on the iterative least-squares algorithm,the structure of the narrow-band IQ calibration module is designed.The resources of the unbalanced parameter calculation module and the iterative control module are reused.Finally,the digital channel module is simulated and verified by FPGA.The pre-simulation result of the sub-module and the whole module are respectively displayed.The test platform is built based on ZYNQ and AD9361,and the UART module and SPI module are designed on the ZYNQ platform to communicate with PCs and the AD9361 board.We do test on this platform to verify the functionality and performance of the digital channel module.The out-of-band attenuation of the digital filter can reach 76dB,and the narrow-band IQ calibration DC rejection ratio and image rejection ratio can reach 52dB,which meets the design requirements of the project.The digital channel module designed and implemented in this paper is more versatile,more resource-saving,and has good research and application value.