Design And Implementation Of A High-Performance Digital Audio Processor

With the advancement of science and technology,and the improvement of human living standards,people have also put forward higher requirements for the quality of audio playback.Digital audio processing technology has gradually replaced the traditional analog audio processing,because of the advantages of its higher fidelity(high sampling accuracy and high sampling frequency),the inability to mix noise during processing(not affected by temperature,voltage,etc.),and the simple and versatile implementation methods.At present,high-performance digital audio processors have been widely used in notebooks,automotive influences,mobile phones,home theaters and other devices.Therefore,designing a highperformance,multi-functional,high-fidelity digital audio processing chip has a very important practical significance.This thesis is originated from the scientific research project of Institute of Electronic CAD of Xidian University,"Research on Electromagnetic Manufacturing Technology of High Speed Electronic Circuit/Key Technologies of Digital Audio Power Amplifier and Intelligent Photoelectric Sensing Integrated Circuit".In-depth study of the sound processing algorithm,combined with the current mainstream digital audio processing system architecture,design and implementation of a programmable high-performance digital audio processor.The main research contents and results of this paper are as follows:1.In the audio processing process,multiple sampling rate changes are used to support higher sampling frequencies,up to a sampling frequency of 192 KHz.In order to overcome the limitation of the master clock frequency,the structure of the interpolation and decimation filter is improved,not only saves clock resources,but also reduces storage resources to half of the traditional.2.Aiming at the shortcomings of traditional 3D audio processing,such as large amount of calculation and large amount of storage,a new 3D audio algorithm is proposed,which has advantages such as simple structure and small amount of calculation.3.The multi-band AGL has been added to the volume control to achieve more dynamic range control.This design optimizes the structure of the traditional frequency divider and reduces the use of filters,thereby reducing the chip area.4.The hardware implementation structure of the audio equalizer unit has been improved,and the storage resources are reduced to half that of the conventional ones in the case where the amount of calculation remains unchanged.5.An audio sigma-delta(?-?)DAC with 3rd order Mash structure is proposed.The digitalto-analogue converter uses a first-order phase accumulator to implement the traditional ?-? architecture and implements it using hardware description language.This way,the entire system is implemented in digital and fundamentally solves the mismatch between levels problems,thereby improving system performance.The measured SNDR of the chip is as high as 90 d B,and the THD+N is kept within 0.4%.This thesis firstly introduces the overall architecture of the digital audio processing;then studies the algorithms of each sub-module and uses the simulink simulation tool in MATLAB to verify and optimize the algorithm to make it more suitable for hardware implementation;then the verilog language is used to implement each modules,and perform detailed simulation verification of the RTL-level code of each sub-module;then use FPGA to prototype the entire digital audio processing process to ensure that it meets the hardware implementation requirements in terms of timing and functionality;then digital back-end design using Magnachip 180 nm 1P4M standard CMOS process,generate the final tape layout;Finally,conduct detailed test on the function and performance of the chip.