Research And Design Of A High Density Single Photon Detector Pixel

Single photon avalanche diode(SPAD)has a high sensitivity detection characteristic of single photon level,which is gradually applied in the fields of Raman spectroscopy,positron emission tomography and fluorescence lifetime imaging,etc.Compatible with nano CMOS integrated circuit technology,SPAD detector can integrate SPAD device,pixel circuit and readout circuit on single chip,which contributes to the advantages of low cost and miniaturization.Therefore,improvement of pixel density and the integration of SPAD array have become research hotspot and development tendency of SPAD array detector.Aiming at the research goal of high integration,this thesis studies how to effectively reduce the pixel area and improve array density of SPAD detector with high performance.Firstly,the small size SPAD device is researched.The changes of the electric field in the avalanche area,the breakdown characteristics and the photon-detecting area with the size reduction are carefully analyzed for the traditional p-well guard ring structure and the two types of virtual protection ring structure devices.The TCAD simulation by Silvaco software shows that the active region's size of the traditional guard ring structure is not suitable to be reduced below 8?m while the active area of two virtual guard ring structures can be reduced to 2 ?m.Furthermore,the simulation and modeling of dark count rate(DCR)and photon detection efficiency(PDE)of the virtual guard ring device are carried out.The theoretical calculations show that the highest PDE is up to 30%,and the DCR is lower than 200 Hz at the excess bias voltage of 3.5 V at room temperature.Secondly,the analog photon-detecting SPAD pixel is studied.Based on 0.18 ?m CMOS process,a highly reliable active quench/reset circuit and a compact analog counting circuit are designed.The counting circuit consists of only five MOS transistors and a small counting capacitor.When the counting capacitor value is 150 fF,the dynamic counting range reaches 8-bit.The simulation results illustrate that the dead time of the quench reset circuit is reduced to 5ns,which can detect the photon with the highest speed of 200M/s.The differential nonlinearity(DNL)of the counter is within 1LSB,and the non-uniformity is less than 0.2%.Finally,the pixel layout with high fill factor is designed.In order to increase the layout fill factor,the SPAD device is designed by octagonal shape,meanwhile the layout of the quench/reset circuits and the counter circuits are arranged in gaps between the SPAD devices so as to obtian the largest fill factor when the pixels form an array.Based on 0.18 ?m CMOS process,the area of one pixel is 37 ?m × 34 ?m and the fill factor of the array reaches 19%,which makes it possible to implement high-density array-level SPAD detectors.