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Research Of Fully Integrated And High Density Single Photon Avalanche Diode Array Detector

Posted on:2016-06-21Degree:MasterType:Thesis
Country:ChinaCandidate:H YueFull Text:PDF
GTID:2308330473465323Subject:Integrated circuit engineering
Abstract/Summary:PDF Full Text Request
Single photon avalanche diode(SPAD) array operating in Geiger mode has both optical sensitivity detection and picoseconds time-correlation. It can detect weak optical signal at high speed and has been used in different fields, such as physics, chemistry, biology, astronomy, and so on. Based on modern Nano-CMOS technology, the SPAD device, pixel circuits, and peripheral readout circuits can be integrated on a single chip. In this thesis, a 128 × 128 fully integrated and high-density SPAD array detector in SMIC 0.18 μm is presented.Firstly, a new structure of SPAD devices with virtual guard-ring and shallow trench isolation is proposed, in which the active area diameter is decreased to 5 μm, while the diameter of entire device is reduced to 11μm. The suitability of structure with small size is demonstrated by the distribution of the electric field and doping concentration, the avalanche voltage, and the internal field intensity distribution in TCAD simulation. Dark count and afterpulse caused by heavy doping and material defects can be avoided by this structure.Secondly, a high density SPAD pixel is designed, which consists of a quenching-reset circuit that can complete the whole process in 3.5 ns and an analog-count circuit in ultra-small scale. For this pixel, the linear-count could reach 103, while the logarithmic count could reach 105In summary, mature CMOS-APS architecture is applied in this SPAD array. By the using of circular SPAD with the virtual ring structure, the diameter can be reduced to 11 μm. Unlike the traditional digital counting circuits, the active quenching and analog-count circuits are firstly embedded around the SPAD devices as a whole, which will improve the integration and utilization with a 150 fF capacitor. By this method, the speed and occupied area can acquire a balance. Besides this, it can also significantly improve the pixel duty by using a cross capacitor embedded in circular SPAD arrays.Thirdly, a SPAD array with column-parallel processing is presented. Sharing the 8-bit channels, the multiplexers are used for inputing the pixel data. For both dark and light environment, two kinds of signals are sampled and subtracted by the use of correlated double sample circuits. And then the pure analog signal, which can directly reflect the incident light is acquired. In addition, the Gray coding circuits and decoding-control circuit that can be used for selecting word line are also designed. Finally, a 1MS/s 8-bit low consumption and low voltage successive-approximation ADC is proposed. of the chip.
Keywords/Search Tags:Fully integrated, high-density, SPAD array detectors, virtual guard-ring, analog count, CMOS-APS
PDF Full Text Request
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