The Design Of Quenching Circuit For SPAD Of Large-Scale Array Dimensions

Single Photo Avalanche Diode(SPAD) has the character of fast sensing and quenching, which is the key precondition to implement the detection of single photon. With the development of research on SPAD, the array is continuously expanding. And the corresponding quenching circuit is getting more difficult to be designed, while of which the performance will directly affect the overall performance of detection system. This thesis studies the quenching circuits applied to the SPAD detector of large-scale array dimensions.In this thesis, two kinds of quenching circuits are presented applied to large-scale dimensions of SPAD with strict constraints of power consumption and layout area:one with resistive sensing and one with capacitive sensing. Both circuits are operated in gated mode with active quenching, and each uses a resistor or capacitor to sense the avalanche current. The quenching circuit with resistive sensing is based on a differential amplifier with offset control, making a breakthrough that the minimum detection threshold of quenching circuit is no longer limited by the threshold voltage of the MOSFET, and achieves the rapid detection for avalanche current. The quenching circuit with capacitive sensing employs the parasitic capacitance of SPAD to sense the avalanche current, thus greatly reduces the layout area. And the circuit uses an inverter as the voltage comparator, which accelerates the quenching process and reduces the system’s power consumption.The two kinds of circuits are respectively integrated to the readout circuit in the scale of 8×8 array and 64×64 array and taped out using TSMC 0.35μm CMOS process. The post simulation results indicate that the circuits can detect the avalanching current as low as 200μA, and can finish the resetting process within 2ns and the quenching process within 5ns. It means that, compared with reported research results of the domestic and international, the designs in this thesis have the advantage of resetting and quenching time. The measurement results show that the circuits can achieve the basic functions. As the effects arising from the layout parasitics of the large array system, there are some differences between the measurement results and the design specifications. Optimization methods are discussed in the end.