Research And Realization Of Technologies In Channelized Digital Receiver

Because the electromagnetic environment of the modern war is grow more andmore complex and the sorts of signals are more and more larger, people need a receivercan solve these problems: wideinstantaneous bandwidth coverage, large dynamic scope,digital processing, sharp sensitivity and the ability to handle with multiple simultaneousarrival signals. However, the proposed channelized digital receiver is such a receiverthat demanded. The channelized digital receiver, based on the principles of softwareradio, can process multiple simultaneous arrival signals and receive signals with allprobability. For such reasons, the channelized digital receiver becomes a hot spot in theresearch of electronic reconnaissance.This dissertation is based on the basic principles of channelized digital receiver. Inthe dissertation, we study a variety of structures of channelized digital receiver, andaimed at the input instantaneous bandwidth of700MHz, we research the polyphase DFTchannelized digital receiver structure and its FPGA implementation process. The maincontents of this dissertation are as follows:1. Several common channelized receiver structures are discussed, in the case ofdifferent channel partitions and based on the low-pass filter bank channelized digitalreceiver structure, this dissertation derives the structure of the polyphase DFTchannelized digital receiver.2. To solve the problems of the channel fuzzy of channelized digital receiver andlow frequency measurement accuracy, this dissertation discusses the instantaneousfrequency measurement technology and apply it to the channelized structure. Theproposed theory is finally verified by Matlab simulation.3. In the case of no-blind spots channelization and the decimation rate is half of thenumber of channels, based onthe structure of the polyphase DFT channelized digitalreceiver, this dissertation studies the structure of the odd-even channelized digitalreceiver, and its derivation of the proposedstructure is given in detail.The correctness ofthe theory is verified by Matlab simulation.4. The dissertation discusses the non-uniform channelization filtering principle based on FFTalgorithm, and studies a new approach, the overlap-add FFT modifiedalgorithm, which can greatly improve the system resource utilization.5. Design a polyphase DFT channelized digital receiver system, of which the inputinstantaneous bandwidth is700MHz, and the number of channels is32. In the first, weuse Matlab simulation to verify the correctness of the proposed theory. Then we designits FPGA hardware implementation structure and describes the working principle ofeach module in detail. At last, we prove the feasibility of its FPGA hardwareimplementation structure through the functional simulation of the system.