Design And Assessment Of Adders Based On QCA

The feature size of CMOS is decreasing steadily with increasing of chip integration,which causes some unavoidable issues,such as high leakage current and high power consumption.In order to solve these problems,nanotechnology may be a prospective alternative.Quantum-dot cellular automata(QCA)is more likely to replace traditional CMOS devices for higher levels of integration,faster operation speed and working at room temperature.QCA has obtained rapid development since it was arose.The paper summarizes the design principles of QCA circuits in order to achieve efficient and stable circuits.The principles are analyzed with regard to primitive device units so that any circuit could be implemented by using them.A relatively complete evaluation system is also analyzed to assess the performance of QCA circuits.At the same time,the design methods are then presented.All these aspects are the basics of QCA.High performance adders occupy an important position in QCA circuits since adder is the core in a computing system.In this paper,three existing schemes of QCA full adders(FAs),namely R Zhang FA,MR Azghadi FA and V Pudi FA,are analyzed in detail using probabilistic transfer matrix(PTM)to find out the most robust one.Three types of n-bit carry flow adders connected serially by these three FAs respectively are also analyzed in terms of complexity,irreversible power dissipation and cost to find out the corresponding FA scheme with best performance.It turns out that MR Azghadi FA always performs well by these two means.With MR Azghadi FA layout,a new logic gate and coplanar QCA FA are then proposed.Analysis and comparison with previous coplanar FAs demonstrate that the proposed FA has a great optimization with respect to area,cell count and power dissipation and also has favorable scalability.The manufacturing process of QCA,however,is immature for commercial production because of the high defect rate.Seeking for designs that display excellent performance shows significant potentials for practical realizations.In this paper we propose a 5×5 module,which not only can implement three-input majority gate but also can realize five-input majority gate by adding another two inputs.A comprehensive comparison is made in terms of area,number of cells,energy dissipation and fault tolerance against single-cell omission defects with existing majority gates respectively,which demonstrates outstanding performance.Based on proposed majority gates,two types of QCA full adders are designed and perform well,especially on the fault tolerance.Finally,well-behaved multi-bit adders are put forward using one of the proposed full adders to show practicality.