Implementation And Verification Of G.729 Speech Coding Algorithm Based On FPGA

With the development of multimedia technology,people raise higher performance requirements for speech coding.G.729 speech coding algorithm can guarantee the high voice quality along with low delay and low code rate for voice compression.However,there exists a certain performance limitation of DSP hardware implementation G.729 now,which can no longer meet the needs of the latest projects.G.729 based on FPGA/ASIC is particularly urgent.In this paper,the basic principle of G.729 is analyzed in detail firstly.Then,the actual performance of G.729 algorithm is simulated by software and the coding algorithm is verified.For the follow-up hardware implementation and verification,the theoretical basis and reference data are provided.This paper designs G.729 encoder IP core based on Vivado HLS high-level-synthesis tool.The C code is adjusted and transplanted to the HLS platform.After synthesis,co-simulation,IP packaging and other steps,the G.729 encoding algorithm IP core which can be used for subsequent hardware development under the Vivado platform is finally generated..In order to drive the IP core,IP core peripheral circuits are designed by Verilog language and constitute the G.729 code verification system with the IP core.In order to reduce the algorithm delay and the hardware resource occupation furtherly,the linear prediction part of the G.729 coding algorithm is designed by Verilog language.The top-down design approach is used to partition the linear prediction system into following functional modules:pre-processing filter module,windowed module,auto-correlation module and the Levinson-Durbin algorithm module.The simulation of each module and system are completed under the Vivado platform.The above two systems are synthesized and implemented respectively.The hardware verification is performed on the KC705 development board of Xilinx,and the signal is captured by the logic analyzer.The correctness of the overall hardware design is verified by the consistent hardware and software simulation results.Finally,the shortcomings in the design and future research directions are presented in the last section of this paper.