The Research And FPGA Implementation Of MELP Vocoder

Digital radio has become a current research focus in the field of wirelesscommunications. The unique advantage in spectrum utilization, call quality andreliability and confidentiality make digital radio become an inevitable trend toreplace analog radio. Dedicated chip solution is an effective way to reduce costs, andit is bound to be the future development direction of digital radio. The key to thesuccess of industry changes is the research of the digital radio special chip. MasterASIC design equal standing on the high ground of the digital radio industry.Speechcoding is the core part of the digital radio baseband processing, and the choice ofvocoder’s algorithm and realization architecture relate to call quality and the abilityto improve spectrum utilization. Discussing the design of dedicated chip aboutspeech coding algorithms is an important part of digital radio baseband chip. It hasimportant research value and broad market prospects.This thesis completed the research of coefficient quantization, VHDL modelingand FPGA implementation of the digital filter, the creating of the voice dataacquisition and playback channel on the DE2platform that use FPGA chip and thedesign of the integer pitch estimation, fractional pitch estimation and linearprediction analysis of the vocoder algorithm based on in-depth study of the MELPvocoder algorithms and implementation architecture. The speed and resource of therelated realization circuit is optimized by using the technology of pong operation,serial-parallel conversion, pipelining as well as data synchronous in asynchronousclock domain. And the optimization of the MELP algromition in the fixed-pointcalculation problem is considered to improve the accuracy. Finally each module issimulated and verified, and the simulation result is consistent with C fixed-pointalgorithms in DSP platform. It also shows that the design of the modules can meetthe requirement of the low-rate speech coding in the digital interphone.