Design Of Self-refresh And Error-Correction Code SRAM Memory Chip

With the rapid development of the society,the microelectronics industry is also making continuous progress.The reduction of the size of electronic components makes the integration of the circuit more and more high,and the speed of the circuit is becoming faster and faster.A higher level of integration and faster speed means a larger amount of data.The proportion of memory in integrated circuits is also increasing.The phenomenon of single particle flip caused by space radiation has always been a thorny problem affecting the stability of memory such as sram.Therefore,in the design of memory,we have to consider how to ensure the correctness of data reading and writing.The introduction of error correction code(ECC)error correction code is the main scheme to solve the stability of memory such as sram.Although additional ecc cells are added to the memory at the expense of the area,the stability of the memory read and write is obtained.Based on 130nm silicon-on-insulator(SOI)technology,a self refresh circuit designed correcting a support SRAM memory.The main work is reflected in:BCH algorithm,Hamming algorithm is analyzed and compared,in the area of consumption,power consumption and other aspects of correcting ability,comprehensive measure is designed to correct error system chooses Hamming algorithm;design the ECC encoding and decoding of digital circuit module,self refresh digital logic circuit,SRAM memory array,Mbits self test circuit,solves the problem of single event upset memory space radiation caused by combinational logic circuit;self refresh function is optimized for the same data address error accumulation problem,the input data by single byte packet parallel encoding increases the error correcting capability of ECC codec.Firstly,the thesis introduces the digital ic design flow of single particle flip effect,the basic digital circuit,the memory circuit of SRAM and the theoretical basis of ecc.The error-correcting technique applied in memory circuit is analyzed.On this basis,the theoretical basis,function realization,simulation verification and digital back-end layout generation of bchhamming codec are described in detail,and then the advantages and disadvantages of the two algorithms are compared,and a self-refresh error-correcting system based on hamming algorithm is designed.It is applied to single byte write operation sram to improve the performance of sram against single particle flip effect.The design principle and simulation results of the system are given,and the anti-irradiation sram memory is designed and the transistor-level simulation is given.The simulation results of the self-refresh error-correcting system show that the design works well at the speed of 80 m and the anti-radiation effect of soi process is very good,and the anti-seu performance of edac is also enhanced...