Design And Implementation Of Uplink Channel Estimation And Equilibrium In TD-LTE System On FPGA

With the rapid development of 3GPP Long Term Evolution(LTE)technology and the continuous advancement of wireless communication technology,as a relatively key part of the LTE uplink,the importance of the channel estimation and equalization module is self-evident.The performance of a wireless communication system is mainly determined by the wireless channel,and fading generated in the channel greatly affects the accuracy of information transmission from the transmitter to the receiver.In order to accurately recover the transmitted signal at the receiver,we use the channel estimation and equalization module to reduce the bit error rate in transmission.This article is based on the project of "Developing TD-LTE Base Station Processing System Based on FPGA".It mainly designs and implements the channel estimation and equalization module of TD-LTE uplink channel based on FPGA.This article starts from the theory,introduces the technical characteristics of LTE system and FPGA,explains the physical characteristics of the wireless channel,and analyzes the types and causes of channel fading.It also focuses on various aspects of the LTE physical layer,such as OFDM technology,SC-FDMA technology,frame structure,and resource grid.At the same time,the algorithm of channel estimation and equalization is compared with matlab simulation.According to the demand,the optimized MMSE algorithm is selected as the final solution for channel estimation and equalization.Then from the point of view of design and implementation,this paper describes the structure design and implementation process of each module of LTE uplink included in the system,and explains the interface functions between modules in detail.This paper uses Xilinx's Virtex-6 chip to build a simulation hardware platform,using the pilot signal in the channel to complete the implementation of the channel estimation and equalization module,using VHDL hardware logic language modeling,and then through ISE to complete the integrated implementation.At the same time,the hardware resources of the FPGA are relatively scarce.This paper combines the characteristics of FPGA hardware to further improve the implementation of the optimization system,such as the improvement of the complex multiplier,the calculation of the lookup table interpolation,and the calculation of the shift length division.These designs not only improves the processing speed of the system,simplifies the implementation structure of the system,but also saves valuable on-chip hardware resources of the FPGA.Finally,this paper uses the matlab and modelsim to carry out the functional simulation and performance test of each module designed and implemented in the LTE uplink system,and uses the chipscope to carry out board-level testing,and compares the board-level signal with the simulation results.The analysis results show that the function of the entire channel estimation and equalization system is operating well,not only can accurately recover the original signal,but also reduce the hardware implementation complexity and power consumption.