Design And Implementation Of High Performance FFT/IFFT Processor For MIMO-OFDM Systems

With the continuous improvement of IT technology and people’s communication needs, higher and higher data transfer speeds and spectrum utilization rate is necessary in wireless broadband communications. MIMO-OFDM system can not only against frequency selective fading and multipath interference, but can largely enhance channel capacity and spectral efficiency whitout increase channel bandwidth. FFT/IFFT processor is one of core modules in the MIMO-OFDM system by completing modulation and demodulation. To meet the needs of the MIMO-OFDM system, FFT processor is required to possessing ultra-high data throughput and low resource consumption, and to ensure a high data accuracy.Firstly, this paper researches and analyzes of principle and system model of MIMO-OFDM systems, and analyzes the design requirements of FFT/IFFT processor in MIMO-OFDM systems. And then, study various FFT algorithms in depth, and complete a comprehensive comparison of their algorithm complexity and hardware complexity. After that, this paper makes a summary and overview of the various hardware architecture of FFT processor. To meet the needs of ultra-high data throughput and low resource consumption of MIMO-OFDM systems, this paper proposed an improved structure of a combined architecture with pipeline MDC and Serial-Parallel.With the proposed improved structure, this paper designed a 128/64 point FFT/IFFT processor. In consideration of the Xilinx FPGA hardware architecture, this paper did some optimized design for ROM memory and complex multiplier unit. Completed the RTL code design for the 128/64 points FFT/IFFT processor and a function simulation platform was built to complete the RTL function simulation. Using Xilinx ISE XST completed its synthesis, and finally completed the circuit verification and test of 128/64 points FFT/IFFT processor by builting the FPGA hardware test platform. The design of the FFT/IFFT processor, which is designed by the proposed hybrid structure, was implemented in the Xilinx Virtex-6 FPGA with maximum operating frequency of 305 MHz, and the data throughput of up to 2.4Gsps or more, and with relatively low hardware resource consumption. Simulation and hardware test results show that the design of the FFT/IFFT processor fully meet the requirements of MIMO-OFDM systems.