Clock Synchronization System Design Based On IEEE802.1AS

With the rapid development of automotive electronics and other fields,a large amount of time-sensitive real-time data such as audio and video need to be transmitted through Ethernet,which put higher requirements on clock synchronization of time-sensitive networks.The accuracy of the clock synchronization is mainly affected by three aspects.Firstly,the crystal oscillator of the clock does not resonate with the main clock,resulting in a frequency error and a phase angle deviation.Secondly,the packet needs to be encapsulated by the protocol stack,then the actual transmission and reception time of the packet could not match the acquired time stamp exactly.The last is that there exists path delay during message transmission.Therefore,the IEEE802.1 working group has developed the IEEE802.1AS clock synchronization protocol to solve the above problems.Its synchronization accuracy has reached sub-microsecond level and can be satisfied in most applications.At present,there are few studies on the IEEE802.1AS protocol in China,and there are few devices supporting the IEEE802.1AS protocol.Therefore,it is necessary to design an IEEE802.1AS clock synchronization system.In this paper,the IEEE802.1AS clock synchronization protocol is studied in detail.The delay measurement principle and time synchronization principle in the protocol are analyzed.Altera's Cyclone 10 LP series FPGA is used to design and implement a set of clock synchronization by software and hardware collaborative design.System and optimize it.The design can be based on MAC address transmission or MAC address based on IP address UDP transmission,to achieve g PTP message and car Ethernet information transmission function;design time stamp module to achieve hardware tag time stamping function;design clock module to achieve high precision Synchronous clock;design register module to realize the interaction between CPU and underlying hardware;design upper layer software based on Nios II embedded soft core,realize delay measurement and time synchronization function required by IEEE802.1AS protocol;use delay measurement optimization algorithm to reduce delay Measurement error;use frequency compensation algorithm to improve time synchronization accuracy.Finally,the hardware module of the system is simulated,the overall function of the system is tested,and the point-to-point clock synchronization experiment is performed.The simulation results show that each hardware module can work normally according to the design requirements,and the UDP data transmission function and master-slave synchronization function of the test system are normal.The point-to-point clock synchronization experiment shows that the system can achieve sub-microsecond synchronization accuracy required by IEEE802.1AS protocol,and verify the correctness of the design.