Design Of Low Power Simple Handheld Oscilloscope Based On FPGA And Nios ?

The oscilloscope,as "the eyes of an electronic engineer",is one of the most commonly used measuring instruments in the engineering field.Hand-held oscilloscopes overcome the shortcomings of the large size and high power consumption of traditional digital oscilloscopes,while keeping the basic functions of traditional digital oscilloscopes,making the oscilloscopes more compact and portable,especially suitable for outdoor and the volume requirements of measuring instruments Used in very strict environments.However,the price of handheld oscilloscopes on the market today is extremely expensive,and the prices of imported handheld oscilloscopes can reach tens of thousands of yuan.For simple measurements,there is still much room for optimization in terms of power consumption,volume,and cost.In response to the above problems,this article designs a simple low-power handheld oscilloscope based on FPGA and Nios ?,optimizes the power consumption,volume and cost of the existing handheld oscilloscopes on the market,and can perform general measurements.The functional requirements and technical indicators of the oscilloscope are elaborated in detail,and the overall scheme design of the oscilloscope and the software and hardware division scheme design are carried out according to the functional requirements and technical indicators.The hardware design is based on FPGA and Qsys.The hardware sub-modules include sampling module,trigger control module,waveform storage module,parameter measurement module,waveform display module,and touch control module.The functions of each module are analyzed in detail and implemented based on FPGA.At the same time,the Qsys system is built in the hardware design as a hardware platform,to implement the subsequent software design.The research in this article focuses on the low power consumption of the oscilloscope.Firstly,analyze the power consumption of FPGA and design the low power consumption of the oscilloscope accordingly.Among them,the most significant low power design method is gated clock technology.However,when using a gated clock to optimize power consumption,it will bring two timing problems,clock skew and metastability.Therefore,the causes of clock skew and metastability are analyzed in principle and the design is introduced.Clock trees and a series of other methods solve both timing problems and use power simulation to analyze power optimization results.The oscilloscope software design is based on Nios ? to draw the oscilloscope operation interface and use Nios ? to control each function module to complete the touch function processing.Finally,the functional test of the design is divided into timing test,overall test and power consumption test.The test results show that the oscilloscope has no timing problems,and the low-power design has a significant optimization effect on power consumption.The remaining indicators meet the requirements and achieve the expected goals.