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Design And Implementation Of A Model Load Image JPEG2000 Decompression System

Posted on:2019-10-27Degree:MasterType:Thesis
Country:ChinaCandidate:C LiuFull Text:PDF
GTID:2382330566988531Subject:Information and Communication Engineering
Abstract/Summary:PDF Full Text Request
Space observation is the key research direction of China's aerospace industry,and remote sensing image is of great value in all fields.Because of the limitation of transmission bandwidth,remote sensing and telemetry images must be transmitted to ground equipment after compression.But with the improvement of observation,remote sensing images are more and more accurate,observation data is more and more big result in ground equipment in the receiving,decompression and store multiple links such as pressure,in addition equipment power consumption,volume and unified interface,and many other problems.Therefore,the special hardware circuit is adopted to realize the rapid decompression of the ground equipment to meet the requirements of the post-processing equipment.The system design takes JPEG2000 as the compression standard,and deals with the problem of power consumption,volume,and decompression rate of a certain type of load image.First of all,according to the characteristics of the ground equipment,the main function of this system include high-speed data interaction with external and internal of multichannel JPEG2000 rapid decompression,to complete the tasks before the data arrives the ground equipment.Therefore,the hardware circuit is designed according to the requirements of the volume,power dissipation and compression rate of the user.And the circuit is mainly composed of FPGA and ADV212 decoding chips.According to the basic functions of the system requirements and technical parameters,it analyzes the main functions of the corresponding modular hardware,and realizes the PCI Express interface circuit,DDR3 interface circuit,ADV212 interface circuit and FPGA peripheral circuit.Secondly,in order to realize the control of the circuit function and parameter configuration of the JPEG2000 decompression system for a certain type of load image,the internal logic based on FPGA is designed.According to the hardware circuit,the functions of each logic module are analyzed,and the logic of PCI Express interface,DDR3 controller and ADV212 controller logic are designed.Finally,the simulation of a model load image JPEG2000 decompression system is under simulating results.Based on the system hardware circuit and logic engineering,the verification platform is built.Through the authentication platform software,the JPEG2000 compression image of different precision is sent,and the hardware logic of the system is simulated and verified.And,with the current mainstream commercial software of image after decompression comparison reference,to show that the decompression system on the premise of meet the volume and power consumption,can accomplish fast JPEG2000 decompression,upon rate reached 5.33 Gbps,33.25% above the standard,and compared with other hardware platform on the eer rate of 2 to 5 times.
Keywords/Search Tags:decompression system, JPEG2000, FPGA, ADV212
PDF Full Text Request
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