The Implementation Of Lifting Wavelet Transform Based On FPGA

With the development of out country economy, the speed of the train is increasing constantly, In order to ensure the safe of the train, the detection of catenaries-pantograph malfunction is extremely significant. The immense data of the original malfunctioned picture makes simultaneous storage and malfunctioned picture transmission quite difficult. JPEG2000 becomes the new standard of the static picture compression which has a widespread use in multimedia, network transmission and other fields. Compared with JPEG which has the same quality, JPFG2000 coder enjoys the higher compression ratio.This paper aims at studying and designing the realization of lifting wavelet transform module based on FPGA. This paper chooses the Cycloneâ…¡of the Altera company. The design of the lifting wavelet transform in picture compression system is based on the method which is commended in JPEG2000.This thesis firstly provides introduction of the development about FPGA, and the relative language Verilog, the design method and procedure of development about FPGA. Then it presents relevant knowledge of the JPEG2000. Then it introduces the design of 1D lifting wavelet transform which includes the base knowledge of lifting wavelet transform and the realization of the 1D lifting wavelet transform,In the end, it introduces the design of 2D lifting wavelet transform which includes replicated frame and serial pipeline frame.This paper introduces the design of lifting wavelet transform in detail and gives the schematic. The all designed schematics are tested and the results indicate that the designed schematics are feasible. The designed schematics provide the base module for the picture compression system JPEG2000.