Research And Design On Reliability Of Spaceborne Computer SRAM

The satellite-borne computer is one of the important parts in ensuring the normal operation of tiny satellites.It plays a very important role in satellite command control,task scheduling and the analysis of key information.Because satellite-borne computer often performs tasks in the radiation environment,its SRAM can easily be hit by energetic particles and create a single-particle effect,which can lead to errors in storing data.Usually,an effective way to solve this kind of error is information redundancy(IC).At present,the existing analysis of the reliability of the on-board SRAM based on IC protection has certain defects,at the same time,in the design of hardware circuit of electric ion reverses,the traditional practice is to use error detection err or correction chip,and it's unable to refresh SRAM' errors,lead to wrong unceasing accumulation,reduce the reliability of satellite-borne computer.Therefore,in this paper,based on the single-particle effect of on-board SRAM caused by the error distribution,the error coverage and the characteristics of information encoding as a theoretical basis for research on IC-based on-board SRAM reliability model and design of the corresponding hardware circuits,and put forward the corresponding improvement and solution aiming at the existed defects and insufficiency.The reliability of IC-protected on-board SRAM is finally evaluated by MTTF(Mean Time to Failure).Aiming at the inaccurate problem of the original algorithm after IC protects the on-board SRAM,this paper summarizes the error distribution characteristics and the error coincidence characteristics according to the principle of the actual on-board SRAM internal storage structure and the error distribution.Improve and design an IC-based on-board SRAM reliability analysis model.A more accurate algorithm to measure the reliability is provided,which is helpful for the theoretical guidance in the design of IC-protected on-board SRAM hardware circuit.The SRAM for the satellite-borne computer may be subject to the shooting problem of high-energy particles,so this paper will design an anti-radiation circuit.The data in SRAM is protected by information encoding,and the error correction principle of the extended hamming code and RM code is studied.Through the mathematical model of the reliability of the assessment to establish the hardware circuit design parameters.And use Verilog language to realize the error correction circuit in FPGA and adopt the refresh mode to avoid the accumulation of error in on-board SRAM,thus improve the dependability of the system.