Research And Implementation Of High-speed Digital Transmission Demodulation Technology

In recent years,broadband satellite communication system has been a huge development,the transmission of data is also faster and faster,so high-speed data transmission technology research imminent.In addition,military and defense applications in a variety of aircraft,aircraft,satellites and so on are the urgent needs of high-speed data transmission system to obtain the amount of data and information.Therefore,the research and development of high-speed data transmission technology is of great significance to the future satellite high-speed information transmission.At present,the high speed data transmission system is mostly digital modulation and demodulation structure,the key is the synchronization technology.Based on the project of teaching and research section,this paper analyzes and studies the demodulation technology of high speed data transmission technology.In this paper,the high speed data transmission system is studied based on the application requirement.The core idea is that each module can be processed in parallel to exchange resources for speed and improve the speed of data transmission.This paper includes the following aspects:the performance of various debugging methods is analyzed and compared,and then the QPSK modulation mode with better frequency utilization and better power utilization is selected;the basic concept of LDPC compiled code;design and implementation of high speed parallel lookup table shaping filter;design and implementation of high speed time parallel matched filter;PLL principle and parameter selection;simulation and Realization of carrier synchronization loop of digital Costas loop based on the Gardner algorithm;bit timing synchronization;Farrow segment analysis parameter design and performance of parabolic interpolation filter and parallel structure.Finally,the system hardware design and system test results are given to prove the correctness and feasibility of the scheme.