Research On Trellis Coded Modulation Techniques In High Speed Data Transmission Systems And Their Applications

DRSS(Data Relay Satellite System) is one of the main projects of our country in recent years, among which the high-speed data communication technology is one of the key points. To solve the problem that the frequency band is very tense in DRSS, it is very necessary to study how to use TCM in high-speed data communication systems, since TCM has an advantage of excellent utility of both frequency band and power. This article grounds on the project of a 300Mbps TCM-8PSK modulating and demodulating system and is developed from it.The high-speed TCM system is studied from the following aspects.Firstly, the differences between a QPSK system and a TCM-8PSK system, and the difficulties in the latter's realization are considered in detail, including the frequency band utility, the group delay effects, the filters'implementation, the base band processing and some key technologies. Furthermore, a method that can realize quasi-constant envelope modulation merely by the change of the coding scheme are proposed to unbend the nonlinear effects in amplifiers.Realization of the wide-band shaping filter in baseband is carefully analyzed, and then a low-cost realization method is brought forward. Furthermore, through shaping filters, I/Q route self-synchronization and compensation and revise of the nonlinearity and the imbalance of amplitude and phase of the modulation circuits are advanced.From the angle of coding, some coding schemes are carefully investigated to reduce the implementation complexity and at the same time retain their power gains, which involve cascaded coding, parallel coding, feedback delay TCM coding, doubly complementary convolutional coding and reduced-state coding.The AT 2 scale based on the internal area-time lower bound of the Viterbi decoder is analyzed. And the AT 2 scales of three VLSI realization algorithms (M-step decoder algorithm, flow and block decoder algorithm, and sliding block decoder algorithm) are deduced. In succession, a fully new algorithm named ring-VD algorithm designed by ourselves is put forward, and its AT 2 scale is also fetched. Comparisons between the above four VLSI algorithms are fulfilled at last.A Viterbi decoder at the information speed of 300Mbps for TCM-8PSK system is designed and realized in FPGA. From its realization, the local short-delay interconnection method, the coding symbol synchronization method of multidimensional TCM, and the reliable receiving structure of high-speed dada are advanced. Furthermore, the design rules of high-speed digital systems and their self-checking and testing techniques are summed up.