Analog Front-end For UHF RFID TAG

IOT(Internet of things)affects peoples' daily life greatly,which is called the forth industrial revolution,and provides a good platform for RFID technology.Because of good characteristics,such as long-distance(1m~10m)identification,anti-interference abilities,huge information storage and long service life,UHF RFID has been widely applied to fields of financial service,e-commerce,intelligent identification,logistics management,public traffic and et al.And UHF RFID has a very bright market prospect worldwide.But the design of passive tag chip is really a hard work and in our country,and the chips are mainly dependent on import.So high-performance tag chip design technique is an important issue for colleges and research institutions.This paper is aimed to design a low-voltage and low-power analog front end for UHF RFID tag,including sub-threshold voltage reference and low-power ring oscillator.The design is based on common analog circuit techniques,and is innovated further.The specific design thoughts and creative points are as follows:1)Sub-threshold Voltage Reference.Applying sub-threshold theory to achieve low-voltage and low-power characteristics.Applying full MOS structure and abandoning the use of resistance and BJT to build circuit to reduce the area of layout and cost.Applying new structure of pre-regulator to improve PSRR(power supply rejection ratio)without the appliance of amplifier.2)Low temperature drift oscillator.This oscillator system contains a LDO constructed by active loads and a high accuracy current reference circuit.The current reference is achieved by two MOSFETs with different threshold voltage,which is either a no-resister design.The amplifier applied to current reference is constructed by push-pull output level and has full swing output characteristic.The simulation results show that: The sub-threshold reference voltage circuit can be started under a voltage less than 0.8V and the typical reference voltage is 429 mV.Temperature characteristic is 35?V/? under TT process model.The power consumption is 0.21?W typically.Mostly,the PSRR is up to-85 dB under low frequency and the line regulation rate is 5.6?V/V in a range of 0.75V~2V.The regulator provides a supply voltage as 0.8V and the line regulation rate is 6.7mV/V with a current consumption lass than 1.5?A.The ring oscillator provides a clock signal around 1.52 MHz and the frequency changes 5% during a wide temperature range as-25?~+40?.The frequency changes around 15% under different process case,which has a power consumption less than 1?W.