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High-Speed DMA Data Transmission Channel In Wireless Receiver Design And Implementation

Posted on:2019-05-19Degree:MasterType:Thesis
Country:ChinaCandidate:F J ZhangFull Text:PDF
GTID:2348330563954419Subject:Engineering
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With the continuous development of wireless communications,traditional hardwarebased wireless communication systems have been unable to meet the ever-changing communication needs.The software radio technology with its advantages of miniaturization,low cost,and flexibility provides a new solution for wireless communication systems.All-programmable system-on-chip(AP SoC)integrates highperformance programmable logic and a flexible processor system to meet the design needs of wireless receivers.How to implement a high-speed data transmission channel is an important issue that needs to be considered when realizing wireless receiver real-time data transmission.Xilinx's Zynq-7000 series all-programmable platform adopts ARM+FPGA architecture,which has the advantages of flexibility and high performance.It is suitable as a miniaturized,integrated wireless receiver implementation platform.This thesis designs and implements a high-speed DMA data transmission channel in a wireless receiver on the Zynq-7000 Series ZC702.Firstly,based on the in-depth study of all programmable system-on-chip,AXI bus protocol technology and direct memory access(DMA)technology,this thesis designs the overall scheme of data transmission channel.In addition,the thesis divides the modules according to the data transmission requirements of each module in the wireless receiver.Then,this thesis completed the design and implementation of the module interconnection in the data transmission channel on the ZC702,in which the DMA IP core was used to achieve high bandwidth reliable data transmission between the programmable logic and the system memory.In addition,this thesis uses programmable logic resources to complete the data package,hardware control and audio data processing design,implementation and simulation.And in this thesis,the bottom layer interface function design and program implementation of the data transmission channel are completed on the processor system,and the data transfer between the peripheral device and the system memory is realized through DMA.Finally,this thesis uses the ZC702 evaluation board to build a verification platform and complete the functional verification of the data transmission channel.It has been verified that the data transmission channel designed and implemented in this thesis can meet the design requirements for uplink and downlink data transmission in wireless receivers and has a good engineering application value.
Keywords/Search Tags:Wireless receiver, DMA, AP SoC, AXI Bus
PDF Full Text Request
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