Design Of S-band Low Phase Noise Frequency Synthesizer Based On DDS And PLL

As the heart of communication system,frequency synthesizer can be applied in many fields such as instrument technology,radar,aerospace and so on.With the rapid development of electronic equipment and the improvement of device technology level,the performance requirements of phase noise,spurious and so on of frequency synthesizer are more and more strict.How to combine direct digital frequency synthesis and phase locked loop frequency synthesis is very important for the development of high performance frequency synthesizer.This paper first discusses the background significance of frequency synthesizer and the development of frequency synthesis technology,focusing on the analysis of DDS and PLL principle and structure,the phase noise,spurious and other basic characteristics of the specific analysis.Considering the limitation of the traditional single frequency synthesis technology,this topic uses the mixed frequency synthesis technology of DDS and PLL,and gives three kinds of common DDS + PLL combination structure.Considering the index requirements and feasibility of this paper,using DDS direct incentive scheme on the structure of the PLL S-band frequency synthesizer.Secondly,the design and implementation of frequency synthesizer is introduced.The system adopts modular design idea,takes FPGA as the central control unit,selects DDS chip AD9910 and low noise digital phase detector chip ADF4108 as the core to build the signal generation module.At the same time,the simulation software ADIsimPLL 4.20 is used to design the PLL circuit,which realizes the simulation of PLL device parameters and related characteristics,verifies the circuit function and improves the design efficiency.The implementation of logic timing of DDS module and PLL module is described in detail.FPGA converts the command of host computer into timing protocol of corresponding register,and outputs relevant operation control signals.Finally,based on the hardware circuit,software program design and debugging,a functional experiment environment is built.The S-band signal of 2.1GHz~2.85 GHz can be stably output through the overall test of the frequency synthesizer.Select different frequency points for testing,the results show that the phase noise of the synthesizer is better than-115dBc/Hz@1MHz and the spurious is better than-60 dBc.