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Design And Implementation Of RRAM Measurement System

Posted on:2019-07-01Degree:MasterType:Thesis
Country:ChinaCandidate:S M WangFull Text:PDF
GTID:2348330542493913Subject:Circuits and Systems
Abstract/Summary:PDF Full Text Request
With the continuous development of social economy and science and technology,memory demand is increasing.Non-volatile Memory(NVM)will occupy an increasingly important position in memory in the future.Flash memory is widely used at the present stage for non-volatile memory.Due to the limitation of the smallest process size and the volume unchanged,Flash cannot continue to increase to a larger capacity.In the future,the development prospect for large capacity demand is worrying.Resistive Random Access Memory(RRAM)has the advantage over other NVM,such as good prospect of microfilming,high storage density and fast programming erasure.So RRAM is considered to be a substitute for other NVM and become the mainstream nonvolatile memory.In spite of this,many important key technical problems need to be solved before large-scale mass production is put into mass production.For example,the study of the RRAM mechanism is not clear,the uniformity of the impedance data parameters of the test is not good,and the reliability of the device needs to be improved.The research and test of RRAM devices are inseparable,but RRAM array test also has the following problems,such as the read pulse time,testing system of semiconductor parameter analyzer used to location,no RRAM specific test system on the market,you can use the commercial machine ADVANTEST V93K test,but the test operation is complex,and the very poor,is not conducive to the research of RRAM.There are some models for the switch matrix using Tektronix 4200 plus self-designed test,but RRAM is different from other NVM programming erased RRAM need validation,is read,and the time in the process of switching matrix switch to the stability of the long reading time is very long,and read the time of uncertainty,the high resistance and low resistance than read much longer,uncertain,difficult to study.Therefore,it is of great importance and significance to design a special test system suitable for the RRAM array to advance the research progress of the resistive memory.To sum up,we have designed a dedicated RRAM array testing system to solve the testing problem of RRAM arrays.The test system we designed has the characteristics of fast reading speed,simple operation and strong applicability,which can speed up the research and development of RRAM.The main contents of this paper are as follows:(1)This paper first introduces the background and significance of RRAM test research,and states the problems faced by RRAM array testing.Then it introduces the basic principles and testing parameters of RRAM,analyzes the requirements,designs the testing methods under the RRAM test mode,and finally designs the test system under the RRAM test mode.The test system designed and implemented can initialize(1MB)RRAM,program and erase and other basic tests,as well as endurance testing.The test system consists of host computer,Cortex-M4 architecture ARM chip core board,we design the peripheral circuit board and chip test fixture,the peripheral circuit board is the core of the external circuit to read and write,read and erase functions with pulse resistor programming function,using the same circuit and the two function does not conflict.There is also a self-designed software code.This paper explains in detail the core part of the test system,the design and implementation of the external reading and writing circuit and software.The output of the ARM core board common output port used to generate the enable signal and a 20 bit address line is RRAM experiment in the test mode,to test the operation using PC to control the lower machine design,function and software design through reading and writing,set,reset,read,endurance etc.chip test operation.(2)The test system is designed to use a new programming and erasure pulse:in the programming process,by adjusting the pulse width and adjusting the pulse height during erasure,this operation method can improve the durability of the device.
Keywords/Search Tags:RRAM, Test mode, Test system, Endurance
PDF Full Text Request
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