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To Improve The Ability Of Switching Transistor Resistance To Electrical Over Stress

Posted on:2018-10-19Degree:MasterType:Thesis
Country:ChinaCandidate:X L ZhaoFull Text:PDF
GTID:2348330542478047Subject:Engineering
Abstract/Summary:PDF Full Text Request
Since transistor appeared in the early 20th century,it produced a third industrial revolution and human gradually toward the era of automation.Switch transistor is a special transistor which looks like an ordinary transistor.Switch transistor work in the zone or saturated to control circuit of truncation or conduction.Because of its characteristics,switch transistor is widely use in various switching circuit.For example,high-frequency oscillation circuit,A/D conversion circuit,pulse circuit,the power switches circuit,etc.Electrical-over-stress injury?EOS?refers to the wafer damaged by the current intensity on the wafer exceed the maximum current of the wafer intensity.The injury can be timely,such as:breakdown,fuse wires,burn and so on;it also can happen after a long time.In the process of semiconductor,EOS problem is very outstanding.It is one of the important problems of the reliability of electronic products.It brought the huge potential effect.EOS problem is deemed to a great importance problem by the people.Therefore,the IEEE society held a meeting every year to study EOS,discuss the EOS problem and show the latest research results.In this thesis,based on the sample device of switch transistor 2907,I researched in the process of wafer design and assembly to improve the resistance of EOS from three aspects:1.By collecting the failure samples,it found the common characteristics of wafer burning point.Then modified the metal wiring layout,and changed the growth way of the SiO2 film in Emitter.Then SiO2 film was more compact and uniform.2.Researched the effect of encapsulation layering to improve the resistance of EOS.According to the test data,layered has no effect to the wafer,but the leakage and the temperature rise because of absorption of moisture and particle enters.So the ability of EOS resistance will drop down.By adjusting the parameters of the molding machine and add the"V"groove design on the lead frame,the Transistor's EOS resistance ability cannot drop down in harsh conditions.3.Encapsulation transistor dissipated heat mainly by the lead frame,and eutectic bonding hole will greatly reduce the wafer's thermal conductivity.Poor thermal conductivity will increase the temperature quickly and reduce the ability of resist EOS.Through studying the characteristics of metal between the eutectic,adjust the temperature and heating time,improve eutectic effect between the wafer and lead frame with little capacity loss,then improve the ability of EOS resistance.The EOS resistance is improved from above aspects.The EOS resistance increase by 25%.
Keywords/Search Tags:Layout design, Layering, Hole, EOS
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