Floating Point High Order FIR Filter Design Based On FPGA

Finite Impluse Response Digital filter is one of the basic components for the field of modern digital signal processing,FIR filter has many advantages such as stable and reliable,flexible structure,linear phase characteristics etc.Therefore,in scientific research and engineering practice field occupies an indispendsable position.However,with the growing demand of scientific research and engineering practice,the performance requirements of FIR filter is increasing constantly,and it also lead to the rising of filter oder,Using conventional method to realize FIR filter is unable to meet the requirement of real-time in modern electronic systems.FPGA has many advantages such as flexible structure,speed,etc.With the development of semiconductor technology and EDA technology.FPGA is not limited to simple logic bonding application,but also can realize complex digital signal processing tasks,it's the ideal choice to realize high speed and high oder FIR filter.This paper first introduces the basic theory and design method of FIR filter.Design hardware circuit with XCLVLX240T-FF1759 FPGA as it's core and describe the principle of each module.According to the principle of FIR filter and the requirements of high speed and high precision requirement,we determine using fast convolution and signle precision floating point arithmetic to implement high oder FIR filter.According to the complex of logic design and hight resources occupation in FFT module design,we derived subsection FFT algorithm which equivalent to tradition FFT algorithm theoretically.Using subsection FFT algorithm can reduce the complexity of logic design and resuce FPGA resource consumption.Basic on above theory,we divided the system into serval modules according to the function.Using HDL language to design each module,describe and simulate the principle of each module.Detailedly describes both the fuctions and principles of each modules and simulated verification erch modules.Finally,we set up harware and software testing environment,and download bit stream file into the FPGA to verify the fuction of FIR filter.The experimental results show that the folating point high FIR filter based on FPGA is completely correct.