Low Power SoC Platform Design For Internet On Things Applications

The main purpose of the thesis research is to design a low power SoC platform for Internet-on-Things applications.With the rapid development of the wireless communication technology,IoT technology has become more mature,and people pay more attention to IoT applications.And with the continuous development of integrated circuit technology,System-on-Chip has become the mainstream of the chip.In addition,the power consumption of the chip will largely affect the performance and application range of the chip,especially for the IoT applications with more impact.So low power design for chip has become increasingly undeniable factor for IC designers.Therefore,the thesis has very important practical significance.Because Bluetooth is one of the most important wireless communication technology,especially Bluetooth Low Energy,is very important for IoT applications.Therefore,to support BLE protocal communication for chip,BLE baseband IP core is designed,including baseband overall architecture design,and function modules logic design,in this thesis,to meet the BLE link layer protocal.In addition,in order to consider the power consumption of the chip,low power design is applied for the SoC,mainly including multi voltage domain design and low power work mode design with power gating and clock gating low power design technology.Finally,in the thesis research,I have also simulated and verified the related functions of BLE and low power mode,and analyzed and evaluated the power consumption of these low power modes,to ensure that the design is correct.The SoC platform which has been designed in this thesis research can be used in the actual SoC projects.Designers can expand the design based on the platform,and improve the design efficiency greatly.