The Design Of Low Power Bootstrapping Adiabatic CMOS Circuits

With the development of modernization,the competition between countries is focused on science and technology.Electronic information industry has become an important factor to restrict the development of Chinese information industry.15 years ago,in the integrated circuit design process,designers often put the chip speed and area as the first consideration elements,often ignoring the serious problems caused by power.However,with the rapid development of integrated circuit industry,especially the size of the process features continue to decrease,integration continues to increase,leakage power consumption continues to rise,the operating frequency of chips will lead to a sharp increase in power consumption.Power consumption make the chips temperature much high,causing a series of problems.Chips designers are aware of the importance of power consumption,so low-power integrated circuit design has become the most important task.So far,a variety of methods to reduce power consumption have been developed,but not enough to meet the requirements of low power consumption.Faced with the awkward situation,from the perspective of changing the way of energy transmission,the researchers have proposed a new way of energy recovery.Adiabatic logic circuit,also known as energy recovery circuit or energy recovery circuit,it is mainly through the reuse of energy to achieve the purpose of reducing power consumption.In this paper,based on the study of the traditional adiabatic circuits,we analyze their shortcomings and improve it,a clocked transmission-gate bootstrapping adiabatic logic is proposed.1-bit full adder,JK flip-flop and decimal counter circuit are designed based on the adiabatic structure.At the same time,the 1-bit full adder and the decimal counter are used to further reduce the power consumption of the circuit by using dual threshold,power control technology.Verifying the feasibility and rationality of the clocked transmission-gate bootstrapping adiabatic circuit by HPSICE software.Finally,this paper also introduces the 3D structure of FinFET devices and FinFET technology.The structures and characteristics of independent-gate(IG)FinFET and short-gate(SG)FinFET devices are introduced.The bootstrapping adiabatic JK flip-flop is designed based on the independent-gate(IG)FinFET device.Compared with the adiabatic flip-flop based on ECRLstructure with short-gate(SG)FinFET devices,through the HSPICE simulation tool,which verifys the independent-gate(IG)structure not only has low power consumption characteristics,and can reduce the number of transistors,reducing the layout area overhead.