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Study On Electrical Characteristics And Reliability Of Polycrystalline Silicon Thin Film Transistor

Posted on:2018-01-12Degree:MasterType:Thesis
Country:ChinaCandidate:K LiuFull Text:PDF
GTID:2348330536978156Subject:Engineering
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Polycrystalline silicon thin film transistors have made a wide range of applications in the active liquid crystal display technology due to its advantages such as low defect state,high mobility,good uniformity and low temperature preparation.This work concentrates on the electrical characteristics and reliability of p-channel polycrystalline silicon thin film transistors especially involving the extraction methods of electrical parameters,low frequency noise characteristics,bias stress effect and the degradation mechanism of electrical properties under irradiation environment.Main content of this work includes:(1)The electrical characteristics of p-channel polycrystalline silicon thin film transistors are investigated.Extracting the threshold voltage of the device by linear extrapolation and the drain-source series resistance of the device by transmission line method.Hole field effect mobility is extracted by multi-frequency capacitance-voltage method,and after considering the scattering effect?trapping state and other factors,the extraction formula is corrected and introduced the degradation factor for improving the mobility precision.The mobility results extracted by multi-frequency capacitance-voltage method are compared with those extracted by the Hoffman method and the linear trans-conductance method.(2)Studying the low frequency noise characteristics of p-channel polycrystalline silicon thin film transistors and analyzing low frequency noise generation mechanism.The experimental results show that the low frequency noise characteristics of the p-channel polycrystalline silicon thin film transistor follow the carrier fluctuation mechanism in the sub-threshold region,the low frequency noise characteristics of the linear and saturation regions follow the mobility fluctuation mechanism.The applicability of BSIM model in polycrystalline silicon thin film transistor is verified,and the fitting noise parameters NoiA,NoiB and NoiC are extracted.The coincidence of the fitting data and the experimental data confirms the inference of the low frequency noise generation mechanism.(3)The degradation mechanism of p-channel polycrystalline silicon thin film transistor under gate stress is studied.Under the negative gate stress,the transfer characteristic shifts to the negative gate voltage direction,the threshold voltage drifts from-6.2 V to-7.5 V,sub-threshold swing gradually increases from 0.51 V/dec to 0.63 V/dec,mobility is gradually reduced to stay a fixed value finally.This is due to the fact that the holes in the channel are trapped in the trap state at the gate oxide-channel interface or injected into the gate oxide layer under the negative gate stress,resulting in generation of new defects.Under the positive gate stress,the transfer characteristics do not shift,and the threshold voltage?sub-threshold swing and mobility remain unchanged,this is the fact that the channel is in depletion state,no movable charges involve in trapping and tunneling,carriers are not trapped and injected into the gate oxide.(4)Studying electrostatic discharge characteristics of p-channel polycrystalline silicon thin film transistors,the device failure mechanism is analyzed.The device exhibits two characteristics of off-state and on-state under TLP electrostatic stress.The breakdown voltage decreases with increasing TLP pulse width,indicating that the breakdown is due to the over-current thermally induced failure rather than over-electric field failure,and the thermal simulation results show drain temperature is as high as 1700 k which indicates device failure is caused by over-current Joule heat accumulation.The electrical parameters under ESD are also extracted,they degrade with the change of electrostatic stress.The interface state also increases with the increase of TLP pulse width,and the effect on the performance of electrical parameters is more obvious.(5)Study on irradiation effect of p-channel polycrystalline silicon thin film transistors.Before and after irradiation,the I-V and C-V curve of the device shift towards the negative gate-source voltage.The threshold voltage shifts from-7.3 V to-11.5 V.With the increasing radiation level,field effect mobility decreases from 85.5 cm~2/Vs to 76.5 cm~2/Vs,subthreshold swing increases from 0.49 V/dec to 0.58 V/dec.This is due to the fact that electron hole pairs are generated in the gate oxide layer during irradiation,and some of these holes are trapped to form positive trap charge and accumulate,resulting in degradation of the electrical properties.With the increasing radiation level,the induced charge density of the gate oxide by radiation is larger than defect density at gate oxide-channel.gate oxide trapping charge mechanism by radiation induction dominants degradation mechanism of electrical properties.
Keywords/Search Tags:Polycrystalline silicon thin film transistors, Multi-frequency capacitor-voltage method, low frequency noise, gate stress, electrostatic discharge, irradiation
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