On-State Model For Polycrystalline Silicon Thin Film Transistors

A comprehensive analytical ON-state drain current model for poly-Si TFTs is developed. From three mobility degradation models previously employed in MOSFETs, the most appropriate model for both n- and p- type poly-Si TFTs is determined. And grain boundary barrier controlled carrier conduction model is adequately incorporated. Based on gradual channel approximation, velocity saturation, grain boundary barrier modulation, and gate voltage dependent mobility degradation effect are naturally included to derive an accurate drain current model, without any other approximations employed. All fitting parameters of present model are the fewest and are all physical explicitly defined, with no artificial factors introduced. Extraction and optimization of the parameters are discussed in detail.Device saturation region is explicitly defined. For the first time, a physical-based full analytical expression for VDsat of poly-Si TFTs is derived, which, after simplified simplification, can be used for straightforward VDsat prediction with reasonable accuracy without measuring device output curves.