Study And Design Of Ultra Low-consumption CMOS Voltage Reference

With the upgrading of wearable electronic equipment and wireless sensor networks,power consumption has become the bottleneck of electronics' miniaturization and endurance.As an important part of analog integrated circuit,power consumption of reference circuit has stepped into nano-watt level.Because traditional bandgap references always need resistors inside,they are not suitable for ultra-low consumption integrated circuits.Besides,low-cost requirement makes integrated circuit more and more digital.So it is really meaningful to study and design ultra-low consumption voltage reference which has simple process,small area occupation and can be fabricated by standard digital CMOS process.The research contents and goal are determined after the analysis of research status of low consumption.Then the working principle and targets are provided.This ultra-low consumption voltage reference is based on sub-threshold MOSFETs,so analysis of the features of sub-threshold is an important part.Analyzed the principle of sub-threshold MOSFET from the MOS structure angle and the energy band angle.Discussed the factors those who influence MOS threshold voltage and analyzed some properties of subthreshold current and voltage.Expressed the design thoughts of this ultra-low consumption reference circuit and provide the basic framework of the circuit.After theoretical analysis,designed an all-MOS ultra-low power voltage reference based on 0.18 um standard CMOS technology.Analyzed and pointed out the disadvantages of this circuit,and provided improving plans.Finished circuit simulation using Cadence spectre and finished layout design.The strengthes and innovation of this voltage reference is as follows: Achieved ultra-low consumption,total consumption is about 127 nW at a 1.2V power supply;Designed a new nano-watt current bias circuit and achieved high PSRR,-80 dB at low frequency and-64 dB at post-layout simulation;Without using resistors and BJTs,has small area occupation,as small as 158um*71um;Can be fabricated by standard digital CMOS process with low cost.