Research Of Driver And Amplifier Circuit In High-speed Low-power Optical Transceiver

The traditional solution of optical interconnect communication is that the parallel electrical signal is converted to the high speed serial electrical signal via SerDes(serializer/deserializer)inside the chip,then converted to the optical signal via the optical transceiver outside the chip.The power is main consumed by SerDes and amplifier.Taken current 28 Gbps system for example,the power consumption is only 7.2pJ/b for just electrical-to-optical(EO)and optical-to-electrical(OE)conversion.But the power budget grows to 29.5pJ/b for the SerDes,circuitry not directly related to the OE-EO conversions.The line rate is another obstacle beside the power.The electrical signal transmission distance is shortened with frequency increasing.Further bandwidth scaling is severely limited as equalization is required to restore signal integrity and retime at the end of the high-speed serial link even for as short distance as a few inches.The SerDes circuit is hindering the development of optical interconnection.As opto-electronic hybrid integration technology developing and the advance of the optical pulse train generator technology,the technology that realize the direct conversion between parallel electrical signal and high speed serial optical signal in one chip is proposed.The time division multiplex is used to realize the conversion between parallel and serial signal in optical link by the high-speed optical switch and precise optical delay line.The parallel signal directly transmit to modulator/demodulator,which avoid the exist of high-speed serial electrical signal skillfully.The demand for driver and amplifier of the structure of transceiver with optical SerDes is different from which in tranditional optical transceiver.The driver and amplifier in a 40 Gbps high-speed transceiver with optical SerDes which made up of 20 parallel 2Gbps signals are designed which used MATLAB and HSPICE under SMIC 0.13 um CMOS processing in this paper.The amplifier which made up of active feedback TIA and limiting amplifier amplify and shape the special narrow pulse in long period.The bandwidth is designed in 1.58 GHz,the amplitude of the output signal is 400 mv,which both fit the demand of the shaping and datarate.The driver which used for optical switch in chip is demand produce ps level narrow optical signal.The driver designed in CMOS process has advantage of accurate phase control,well-integration and well-adapted.The differential output is used for produce push-pull driving pulse which narrow in 25 ps.The driver can work in 1.2v-2.5v wide power voltage range and 1GHz-4GHz wide clock frequency range,translate to different CMOS process easily.The demands of bandwidth growing made the optical SerDes transceiver develop and applicate in the future.The research in this paper has prepared for higher daterate and higher process level integration system design.