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Data Coherence Optimization And Verification Platform Research Of DMA Accessing In Multi-Core DSP

Posted on:2017-10-15Degree:MasterType:Thesis
Country:ChinaCandidate:M LiuFull Text:PDF
GTID:2348330536967725Subject:Software engineering
Abstract/Summary:PDF Full Text Request
Due to its good scalability,low latency communication and power controllable characteristics,the multi-core structure has become current mainstream chip architecture.Multi-core architecture improves system performance through parallel processing,and the increasing on-chip memory has eased the "memory wall" issue.But the data coherence issues caused by multi-core parallel and multi-level memory architecture are still one of the current design problems.Especially in those multi-core DSP(Digital Signal Processor)architecture where SRAM(Static RAM)and cache are coexistence on chip,its high real-time requirements increase the complexity of data coherence solutions and verification.Based on the X-DSP,which is a high-performance DSP processor developed by our group independently and designed for wireless communication,image and video processing.This thesis focuses on data coherence of multi-core DSP,especially the DMA(Direct Memory Access)accessing data consistency's design,optimization and verification.It contains following works:Firstly,combined with the memory architecture and access mode of X-DSP,this paper analyses the data-flow and consistency issues under the various memory access mode,and proposes some optimization schemes for data consistency of DMA accessing,since it has high-performance and real-time requirements.Secondly,this paper has optimized the design of X-DSP's DMA accessing data consistency,achieved pipelined treatment of DMA accessing,and efficient converting with AXI(Advanced eXtensible Interface)protocol.It designs a merging solution of multi-source back-data during pipelined DMA accessing which reduces pipeline stalls and the impact on CPU accessing.It also solves the Tag's contents consistency problems due to L1 D STag(L1D Shadow Tag)introducing and the potential interlock issues of interleaving accesses.Finally,this paper constructs module level universal verification platform of L2 based on UVM(Universal Verification Methodology).During the implementation of platform,it makes intensive studies on code reusability,reference model idea,platform debugging,test planning and other issues.Eventually,it conductes a comprehensive verification and evaluation for the DMA accessing data process based on this platform.The results show that the optimization schemes of DMA accessing data coherence can effectively improve the efficiency of the data consistency maintenance.It also reduces the DMA pipeline stalls caused by AXI burst accesses and snoop operations,solves the issues of STag data consistency,and eliminates the interlock issues of interleaving DMA accesses by multiple cores.
Keywords/Search Tags:Multi-Core DSP, Data Coherence, L1D STag, UVM, Universal Verification Platform
PDF Full Text Request
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